#ifndef _HTC_H_ #warning Header file pic18f4450.h included directly. Use #include instead. #endif /* header file for the MICROCHIP PIC18 microcontroller 18F2450 18F4450 */ #ifndef __PIC18F4450_H #define __PIC18F4450_H extern volatile near unsigned char TOSU @ 0xFFF; extern volatile near unsigned char TOSH @ 0xFFE; extern volatile near unsigned char TOSL @ 0xFFD; extern volatile near unsigned char STKPTR @ 0xFFC; extern volatile near unsigned char PCLATU @ 0xFFB; extern volatile near unsigned char PCLATH @ 0xFFA; extern volatile near unsigned char PCL @ 0xFF9; extern volatile far unsigned char * TBLPTR @ 0xFF6; extern volatile near unsigned char TBLPTRU @ 0xFF8; extern volatile near unsigned char TBLPTRH @ 0xFF7; extern volatile near unsigned char TBLPTRL @ 0xFF6; extern volatile near unsigned char TABLAT @ 0xFF5; extern volatile near unsigned char PRODH @ 0xFF4; extern volatile near unsigned char PRODL @ 0xFF3; extern volatile near unsigned char INTCON @ 0xFF2; extern near unsigned char INTCON2 @ 0xFF1; extern volatile near unsigned char INTCON3 @ 0xFF0; extern volatile near unsigned char INDF0 @ 0xFEF; extern volatile near unsigned char POSTINC0 @ 0xFEE; extern volatile near unsigned char POSTDEC0 @ 0xFED; extern volatile near unsigned char PREINC0 @ 0xFEC; extern volatile near unsigned char PLUSW0 @ 0xFEB; extern volatile near unsigned char FSR0H @ 0xFEA; extern volatile near unsigned char FSR0L @ 0xFE9; extern volatile near unsigned char WREG @ 0xFE8; extern volatile near unsigned char INDF1 @ 0xFE7; extern volatile near unsigned char POSTINC1 @ 0xFE6; extern volatile near unsigned char POSTDEC1 @ 0xFE5; extern volatile near unsigned char PREINC1 @ 0xFE4; extern volatile near unsigned char PLUSW1 @ 0xFE3; extern volatile near unsigned char FSR1H @ 0xFE2; extern volatile near unsigned char FSR1L @ 0xFE1; extern near unsigned char BSR @ 0xFE0; extern volatile near unsigned char INDF2 @ 0xFDF; extern volatile near unsigned char POSTINC2 @ 0xFDE; extern volatile near unsigned char POSTDEC2 @ 0xFDD; extern volatile near unsigned char PREINC2 @ 0xFDC; extern volatile near unsigned char PLUSW2 @ 0xFDB; extern volatile near unsigned char FSR2H @ 0xFDA; extern volatile near unsigned char FSR2L @ 0xFD9; extern volatile near unsigned char STATUS @ 0xFD8; extern volatile near unsigned char TMR0H @ 0xFD7; extern volatile near unsigned char TMR0L @ 0xFD6; // 16-Bit definition extern volatile near unsigned int TMR0 @ 0xFD6; extern near unsigned char T0CON @ 0xFD5; extern volatile near unsigned char OSCCON @ 0xFD3; extern volatile near unsigned char HLVDCON @ 0xFD2; extern volatile near unsigned char WDTCON @ 0xFD1; extern volatile near unsigned char RCON @ 0xFD0; extern volatile near unsigned char TMR1H @ 0xFCF; extern volatile near unsigned char TMR1L @ 0xFCE; // 16-Bit definition extern volatile near unsigned int TMR1 @ 0xFCE; extern near unsigned char T1CON @ 0xFCD; extern volatile near unsigned char TMR2 @ 0xFCC; extern near unsigned char PR2 @ 0xFCB; extern near unsigned char T2CON @ 0xFCA; extern volatile near unsigned char ADRESH @ 0xFC4; extern volatile near unsigned char ADRESL @ 0xFC3; // 16-Bit definition extern volatile near unsigned int ADRES @ 0xFC3; extern volatile near unsigned char ADCON0 @ 0xFC2; extern near unsigned char ADCON1 @ 0xFC1; extern near unsigned char ADCON2 @ 0xFC0; extern volatile near unsigned char CCPR1H @ 0xFBF; extern volatile near unsigned char CCPR1L @ 0xFBE; // 16-Bit definition extern volatile near unsigned int CCPR1 @ 0xFBE; extern volatile near unsigned char CCP1CON @ 0xFBD; extern volatile near unsigned char BAUDCON @ 0xFB8; extern near unsigned char SPBRGH @ 0xFB0; extern near unsigned char SPBRG @ 0xFAF; // Alternate definition for compatibility with other devices extern near unsigned char SPBRG1 @ 0xFAF; extern volatile near unsigned char RCREG @ 0xFAE; // Alternate definition for compatibility with other devices extern volatile near unsigned char RCREG1 @ 0xFAE; extern volatile near unsigned char TXREG @ 0xFAD; // Alternate definition for compatibility with other devices extern volatile near unsigned char TXREG1 @ 0xFAD; extern volatile near unsigned char TXSTA @ 0xFAC; // Alternate definition for compatibility with other devices extern volatile near unsigned char TXSTA1 @ 0xFAC; extern volatile near unsigned char RCSTA @ 0xFAB; // Alternate definition for compatibility with other devices extern volatile near unsigned char RCSTA1 @ 0xFAB; extern volatile near unsigned char EECON2 @ 0xFA7; extern volatile near unsigned char EECON1 @ 0xFA6; extern near unsigned char IPR2 @ 0xFA2; extern volatile near unsigned char PIR2 @ 0xFA1; extern near unsigned char PIE2 @ 0xFA0; extern near unsigned char IPR1 @ 0xF9F; extern volatile near unsigned char PIR1 @ 0xF9E; extern near unsigned char PIE1 @ 0xF9D; #if defined(_18F4450) extern volatile near unsigned char TRISE @ 0xF96; extern volatile near unsigned char TRISD @ 0xF95; #endif extern volatile near unsigned char TRISC @ 0xF94; extern volatile near unsigned char TRISB @ 0xF93; extern volatile near unsigned char TRISA @ 0xF92; #if defined(_18F4450) extern volatile near unsigned char LATE @ 0xF8D; extern volatile near unsigned char LATD @ 0xF8C; #endif extern volatile near unsigned char LATC @ 0xF8B; extern volatile near unsigned char LATB @ 0xF8A; extern volatile near unsigned char LATA @ 0xF89; extern volatile near unsigned char PORTE @ 0xF84; #if defined(_18F4450) extern volatile near unsigned char PORTD @ 0xF83; #endif extern volatile near unsigned char PORTC @ 0xF82; extern volatile near unsigned char PORTB @ 0xF81; extern volatile near unsigned char PORTA @ 0xF80; extern volatile near unsigned char UEP15 @ 0xF7F; extern volatile near unsigned char UEP14 @ 0xF7E; extern volatile near unsigned char UEP13 @ 0xF7D; extern volatile near unsigned char UEP12 @ 0xF7C; extern volatile near unsigned char UEP11 @ 0xF7B; extern volatile near unsigned char UEP10 @ 0xF7A; extern volatile near unsigned char UEP9 @ 0xF79; extern volatile near unsigned char UEP8 @ 0xF78; extern volatile near unsigned char UEP7 @ 0xF77; extern volatile near unsigned char UEP6 @ 0xF76; extern volatile near unsigned char UEP5 @ 0xF75; extern volatile near unsigned char UEP4 @ 0xF74; extern volatile near unsigned char UEP3 @ 0xF73; extern volatile near unsigned char UEP2 @ 0xF72; extern volatile near unsigned char UEP1 @ 0xF71; extern volatile near unsigned char UEP0 @ 0xF70; extern near unsigned char UCFG @ 0xF6F; extern near unsigned char UADDR @ 0xF6E; extern volatile near unsigned char UCON @ 0xF6D; extern volatile near unsigned char USTAT @ 0xF6C; extern near unsigned char UEIE @ 0xF6B; extern volatile near unsigned char UEIR @ 0xF6A; extern near unsigned char UIE @ 0xF69; extern volatile near unsigned char UIR @ 0xF68; extern volatile near unsigned char UFRMH @ 0xF67; extern volatile near unsigned char UFRML @ 0xF66; // Add structured and bitfield defs for USB endpoints and buffer descriptors #include /* Definitions for STKPTR register */ extern volatile near bit STKUNF @ ((unsigned)&STKPTR*8)+6; extern volatile near bit STKFUL @ ((unsigned)&STKPTR*8)+7; /* Definitions for INTCON register */ extern volatile near bit RBIF @ ((unsigned)&INTCON*8)+0; extern volatile near bit INT0IF @ ((unsigned)&INTCON*8)+1; extern volatile near bit TMR0IF @ ((unsigned)&INTCON*8)+2; extern near bit RBIE @ ((unsigned)&INTCON*8)+3; extern near bit INT0IE @ ((unsigned)&INTCON*8)+4; extern near bit TMR0IE @ ((unsigned)&INTCON*8)+5; extern near bit PEIE @ ((unsigned)&INTCON*8)+6; extern near bit GIE @ ((unsigned)&INTCON*8)+7; /* Alternate definitions for INTCON register */ extern near bit GIEL @ ((unsigned)&INTCON*8)+6; extern near bit GIEH @ ((unsigned)&INTCON*8)+7; /* Definitions for INTCON2 register */ extern near bit RBIP @ ((unsigned)&INTCON2*8)+0; extern near bit TMR0IP @ ((unsigned)&INTCON2*8)+2; extern near bit INTEDG2 @ ((unsigned)&INTCON2*8)+4; extern near bit INTEDG1 @ ((unsigned)&INTCON2*8)+5; extern near bit INTEDG0 @ ((unsigned)&INTCON2*8)+6; extern near bit RBPU @ ((unsigned)&INTCON2*8)+7; /* Definitions for INTCON3 register */ extern volatile near bit INT1IF @ ((unsigned)&INTCON3*8)+0; extern volatile near bit INT2IF @ ((unsigned)&INTCON3*8)+1; extern near bit INT1IE @ ((unsigned)&INTCON3*8)+3; extern near bit INT2IE @ ((unsigned)&INTCON3*8)+4; extern near bit INT1IP @ ((unsigned)&INTCON3*8)+6; extern near bit INT2IP @ ((unsigned)&INTCON3*8)+7; /* Definitions for STATUS register */ extern volatile near bit CARRY @ ((unsigned)&STATUS*8)+0; extern volatile near bit DC @ ((unsigned)&STATUS*8)+1; extern volatile near bit ZERO @ ((unsigned)&STATUS*8)+2; extern volatile near bit OV @ ((unsigned)&STATUS*8)+3; extern volatile near bit NEGATIVE @ ((unsigned)&STATUS*8)+4; /* Definitions for T0CON register */ extern near bit T0PS0 @ ((unsigned)&T0CON*8)+0; extern near bit T0PS1 @ ((unsigned)&T0CON*8)+1; extern near bit T0PS2 @ ((unsigned)&T0CON*8)+2; extern near bit PSA @ ((unsigned)&T0CON*8)+3; extern near bit T0SE @ ((unsigned)&T0CON*8)+4; extern near bit T0CS @ ((unsigned)&T0CON*8)+5; extern near bit T08BIT @ ((unsigned)&T0CON*8)+6; extern near bit TMR0ON @ ((unsigned)&T0CON*8)+7; /* Definitions for OSCCON register */ extern near bit SCS0 @ ((unsigned)&OSCCON*8)+0; extern near bit SCS1 @ ((unsigned)&OSCCON*8)+1; extern volatile near bit OSTS @ ((unsigned)&OSCCON*8)+3; extern near bit IDLEN @ ((unsigned)&OSCCON*8)+7; /* Definitions for HLVDCON register */ extern near bit HLVDL0 @ ((unsigned)&HLVDCON*8)+0; extern near bit HLVDL1 @ ((unsigned)&HLVDCON*8)+1; extern near bit HLVDL2 @ ((unsigned)&HLVDCON*8)+2; extern near bit HLVDL3 @ ((unsigned)&HLVDCON*8)+3; extern near bit HLVDEN @ ((unsigned)&HLVDCON*8)+4; extern volatile near bit IRVST @ ((unsigned)&HLVDCON*8)+5; extern near bit VDIRMAG @ ((unsigned)&HLVDCON*8)+7; /* Definitions for WDTCON register */ extern near bit SWDTEN @ ((unsigned)&WDTCON*8)+0; /* Definitions for RCON register */ extern volatile near bit BOR @ ((unsigned)&RCON*8)+0; extern volatile near bit POR @ ((unsigned)&RCON*8)+1; extern volatile near bit PD @ ((unsigned)&RCON*8)+2; extern volatile near bit TO @ ((unsigned)&RCON*8)+3; extern volatile near bit RI @ ((unsigned)&RCON*8)+4; extern near bit SBOREN @ ((unsigned)&RCON*8)+6; extern near bit IPEN @ ((unsigned)&RCON*8)+7; /* Definitions for T1CON register */ extern near bit TMR1ON @ ((unsigned)&T1CON*8)+0; extern near bit TMR1CS @ ((unsigned)&T1CON*8)+1; extern near bit T1SYNC @ ((unsigned)&T1CON*8)+2; extern near bit T1OSCEN @ ((unsigned)&T1CON*8)+3; extern near bit T1CKPS0 @ ((unsigned)&T1CON*8)+4; extern near bit T1CKPS1 @ ((unsigned)&T1CON*8)+5; extern near bit T1RUN @ ((unsigned)&T1CON*8)+6; extern near bit T1RD16 @ ((unsigned)&T1CON*8)+7; /* Definitions for T2CON register */ extern near bit T2CKPS0 @ ((unsigned)&T2CON*8)+0; extern near bit T2CKPS1 @ ((unsigned)&T2CON*8)+1; extern near bit TMR2ON @ ((unsigned)&T2CON*8)+2; extern near bit T2OUTPS0 @ ((unsigned)&T2CON*8)+3; extern near bit T2OUTPS1 @ ((unsigned)&T2CON*8)+4; extern near bit T2OUTPS2 @ ((unsigned)&T2CON*8)+5; extern near bit T2OUTPS3 @ ((unsigned)&T2CON*8)+6; /* Definitions for ADCON0 register */ extern near bit ADON @ ((unsigned)&ADCON0*8)+0; extern volatile near bit GODONE @ ((unsigned)&ADCON0*8)+1; extern near bit CHS0 @ ((unsigned)&ADCON0*8)+2; extern near bit CHS1 @ ((unsigned)&ADCON0*8)+3; extern near bit CHS2 @ ((unsigned)&ADCON0*8)+4; extern near bit CHS3 @ ((unsigned)&ADCON0*8)+5; /* Definitions for ADCON1 register */ extern near bit PCFG0 @ ((unsigned)&ADCON1*8)+0; extern near bit PCFG1 @ ((unsigned)&ADCON1*8)+1; extern near bit PCFG2 @ ((unsigned)&ADCON1*8)+2; extern near bit PCFG3 @ ((unsigned)&ADCON1*8)+3; extern near bit VCFG0 @ ((unsigned)&ADCON1*8)+4; extern near bit VCFG1 @ ((unsigned)&ADCON1*8)+5; /* Definitions for ADCON2 register */ extern near bit ADCS0 @ ((unsigned)&ADCON2*8)+0; extern near bit ADCS1 @ ((unsigned)&ADCON2*8)+1; extern near bit ADCS2 @ ((unsigned)&ADCON2*8)+2; extern near bit ACQT0 @ ((unsigned)&ADCON2*8)+3; extern near bit ACQT1 @ ((unsigned)&ADCON2*8)+4; extern near bit ACQT2 @ ((unsigned)&ADCON2*8)+5; extern near bit ADFM @ ((unsigned)&ADCON2*8)+7; /* Definitions for CCP1CON register */ extern near bit CCP1M0 @ ((unsigned)&CCP1CON*8)+0; extern near bit CCP1M1 @ ((unsigned)&CCP1CON*8)+1; extern near bit CCP1M2 @ ((unsigned)&CCP1CON*8)+2; extern near bit CCP1M3 @ ((unsigned)&CCP1CON*8)+3; extern near bit DC1B0 @ ((unsigned)&CCP1CON*8)+4; extern near bit DC1B1 @ ((unsigned)&CCP1CON*8)+5; /* Definitions for BAUDCON register */ extern volatile near bit ABDEN @ ((unsigned)&BAUDCON*8)+0; extern volatile near bit WUE @ ((unsigned)&BAUDCON*8)+1; extern near bit BRG16 @ ((unsigned)&BAUDCON*8)+3; extern volatile near bit SCKP @ ((unsigned)&BAUDCON*8)+4; extern volatile near bit RCIDL @ ((unsigned)&BAUDCON*8)+6; extern volatile near bit ABDOVF @ ((unsigned)&BAUDCON*8)+7; /* Definitions for TXSTA register */ extern volatile near bit TX9D @ ((unsigned)&TXSTA*8)+0; // Alternate definition for backward compatibility extern volatile near bit TX9D1 @ ((unsigned)&TXSTA*8)+0; extern volatile near bit TRMT @ ((unsigned)&TXSTA*8)+1; // Alternate definition for backward compatibility extern volatile near bit TRMT1 @ ((unsigned)&TXSTA*8)+1; extern near bit BRGH @ ((unsigned)&TXSTA*8)+2; // Alternate definition for backward compatibility extern near bit BRGH1 @ ((unsigned)&TXSTA*8)+2; extern near bit SENDB @ ((unsigned)&TXSTA*8)+3; // Alternate definition for backward compatibility extern near bit SENDB1 @ ((unsigned)&TXSTA*8)+3; extern near bit SYNC @ ((unsigned)&TXSTA*8)+4; // Alternate definition for backward compatibility extern near bit SYNC1 @ ((unsigned)&TXSTA*8)+4; extern near bit TXEN @ ((unsigned)&TXSTA*8)+5; // Alternate definition for backward compatibility extern near bit TXEN1 @ ((unsigned)&TXSTA*8)+5; extern near bit TX9 @ ((unsigned)&TXSTA*8)+6; // Alternate definition for backward compatibility extern near bit TX91 @ ((unsigned)&TXSTA*8)+6; extern near bit CSRC @ ((unsigned)&TXSTA*8)+7; // Alternate definition for backward compatibility extern near bit CSRC1 @ ((unsigned)&TXSTA*8)+7; /* Definitions for RCSTA register */ extern volatile near bit RX9D @ ((unsigned)&RCSTA*8)+0; extern volatile near bit OERR @ ((unsigned)&RCSTA*8)+1; extern volatile near bit FERR @ ((unsigned)&RCSTA*8)+2; extern near bit ADDEN @ ((unsigned)&RCSTA*8)+3; extern near bit CREN @ ((unsigned)&RCSTA*8)+4; extern near bit SREN @ ((unsigned)&RCSTA*8)+5; extern near bit RX9 @ ((unsigned)&RCSTA*8)+6; extern near bit SPEN @ ((unsigned)&RCSTA*8)+7; /* Definitions for EECON1 register */ extern volatile near bit WR @ ((unsigned)&EECON1*8)+1; extern near bit WREN @ ((unsigned)&EECON1*8)+2; extern volatile near bit WRERR @ ((unsigned)&EECON1*8)+3; extern volatile near bit FREE @ ((unsigned)&EECON1*8)+4; extern near bit CFGS @ ((unsigned)&EECON1*8)+6; /* Definitions for IPR2 register */ extern near bit HLVDIP @ ((unsigned)&IPR2*8)+2; extern near bit USBIP @ ((unsigned)&IPR2*8)+5; extern near bit OSCFIP @ ((unsigned)&IPR2*8)+7; /* Definitions for PIR2 register */ extern volatile near bit HLVDIF @ ((unsigned)&PIR2*8)+2; extern volatile near bit USBIF @ ((unsigned)&PIR2*8)+5; extern volatile near bit OSCFIF @ ((unsigned)&PIR2*8)+7; /* Definitions for PIE2 register */ extern near bit HLVDIE @ ((unsigned)&PIE2*8)+2; extern near bit USBIE @ ((unsigned)&PIE2*8)+5; extern near bit OSCFIE @ ((unsigned)&PIE2*8)+7; /* Definitions for IPR1 register */ extern near bit TMR1IP @ ((unsigned)&IPR1*8)+0; extern near bit TMR2IP @ ((unsigned)&IPR1*8)+1; extern near bit CCP1IP @ ((unsigned)&IPR1*8)+2; extern near bit TXIP @ ((unsigned)&IPR1*8)+4; // Alternate definition for backward compatibility extern near bit TX1IP @ ((unsigned)&IPR1*8)+4; extern near bit RCIP @ ((unsigned)&IPR1*8)+5; // Alternate definition for backward compatibility extern near bit RC1IP @ ((unsigned)&IPR1*8)+5; extern near bit ADIP @ ((unsigned)&IPR1*8)+6; /* Definitions for PIR1 register */ extern volatile near bit TMR1IF @ ((unsigned)&PIR1*8)+0; extern volatile near bit TMR2IF @ ((unsigned)&PIR1*8)+1; extern volatile near bit CCP1IF @ ((unsigned)&PIR1*8)+2; extern volatile near bit TXIF @ ((unsigned)&PIR1*8)+4; // Alternate definition for backward compatibility extern volatile near bit TX1IF @ ((unsigned)&PIR1*8)+4; extern volatile near bit RCIF @ ((unsigned)&PIR1*8)+5; // Alternate definition for backward compatibility extern volatile near bit RC1IF @ ((unsigned)&PIR1*8)+5; extern volatile near bit ADIF @ ((unsigned)&PIR1*8)+6; /* Definitions for PIE1 register */ extern near bit TMR1IE @ ((unsigned)&PIE1*8)+0; extern near bit TMR2IE @ ((unsigned)&PIE1*8)+1; extern near bit CCP1IE @ ((unsigned)&PIE1*8)+2; extern near bit TXIE @ ((unsigned)&PIE1*8)+4; // Alternate definition for backward compatibility extern near bit TX1IE @ ((unsigned)&PIE1*8)+4; extern near bit RCIE @ ((unsigned)&PIE1*8)+5; // Alternate definition for backward compatibility extern near bit RC1IE @ ((unsigned)&PIE1*8)+5; extern near bit ADIE @ ((unsigned)&PIE1*8)+6; #if defined(_18F4450) /* Definitions for TRISE register */ extern volatile near bit TRISE0 @ ((unsigned)&TRISE*8)+0; extern volatile near bit TRISE1 @ ((unsigned)&TRISE*8)+1; extern volatile near bit TRISE2 @ ((unsigned)&TRISE*8)+2; /* Definitions for TRISD register */ extern volatile near bit TRISD0 @ ((unsigned)&TRISD*8)+0; extern volatile near bit TRISD1 @ ((unsigned)&TRISD*8)+1; extern volatile near bit TRISD2 @ ((unsigned)&TRISD*8)+2; extern volatile near bit TRISD3 @ ((unsigned)&TRISD*8)+3; extern volatile near bit TRISD4 @ ((unsigned)&TRISD*8)+4; extern volatile near bit TRISD5 @ ((unsigned)&TRISD*8)+5; extern volatile near bit TRISD6 @ ((unsigned)&TRISD*8)+6; extern volatile near bit TRISD7 @ ((unsigned)&TRISD*8)+7; #endif /* Definitions for TRISC register */ extern volatile near bit TRISC0 @ ((unsigned)&TRISC*8)+0; extern volatile near bit TRISC1 @ ((unsigned)&TRISC*8)+1; extern volatile near bit TRISC2 @ ((unsigned)&TRISC*8)+2; extern volatile near bit TRISC6 @ ((unsigned)&TRISC*8)+6; extern volatile near bit TRISC7 @ ((unsigned)&TRISC*8)+7; /* Definitions for TRISB register */ extern volatile near bit TRISB0 @ ((unsigned)&TRISB*8)+0; extern volatile near bit TRISB1 @ ((unsigned)&TRISB*8)+1; extern volatile near bit TRISB2 @ ((unsigned)&TRISB*8)+2; extern volatile near bit TRISB3 @ ((unsigned)&TRISB*8)+3; extern volatile near bit TRISB4 @ ((unsigned)&TRISB*8)+4; extern volatile near bit TRISB5 @ ((unsigned)&TRISB*8)+5; extern volatile near bit TRISB6 @ ((unsigned)&TRISB*8)+6; extern volatile near bit TRISB7 @ ((unsigned)&TRISB*8)+7; /* Definitions for TRISA register */ extern near bit TRISA0 @ ((unsigned)&TRISA*8)+0; extern near bit TRISA1 @ ((unsigned)&TRISA*8)+1; extern near bit TRISA2 @ ((unsigned)&TRISA*8)+2; extern near bit TRISA3 @ ((unsigned)&TRISA*8)+3; extern near bit TRISA4 @ ((unsigned)&TRISA*8)+4; extern near bit TRISA5 @ ((unsigned)&TRISA*8)+5; extern near bit TRISA6 @ ((unsigned)&TRISA*8)+6; #if defined(_18F4450) /* Definitions for LATE register */ extern volatile near bit LATE0 @ ((unsigned)&LATE*8)+0; extern volatile near bit LATE1 @ ((unsigned)&LATE*8)+1; extern volatile near bit LATE2 @ ((unsigned)&LATE*8)+2; /* Definitions for LATD register */ extern volatile near bit LATD0 @ ((unsigned)&LATD*8)+0; extern volatile near bit LATD1 @ ((unsigned)&LATD*8)+1; extern volatile near bit LATD2 @ ((unsigned)&LATD*8)+2; extern volatile near bit LATD3 @ ((unsigned)&LATD*8)+3; extern volatile near bit LATD4 @ ((unsigned)&LATD*8)+4; extern volatile near bit LATD5 @ ((unsigned)&LATD*8)+5; extern volatile near bit LATD6 @ ((unsigned)&LATD*8)+6; extern volatile near bit LATD7 @ ((unsigned)&LATD*8)+7; #endif /* Definitions for LATC register */ extern volatile near bit LATC0 @ ((unsigned)&LATC*8)+0; extern volatile near bit LATC1 @ ((unsigned)&LATC*8)+1; extern volatile near bit LATC2 @ ((unsigned)&LATC*8)+2; extern volatile near bit LATC6 @ ((unsigned)&LATC*8)+6; extern volatile near bit LATC7 @ ((unsigned)&LATC*8)+7; /* Definitions for LATB register */ extern volatile near bit LATB0 @ ((unsigned)&LATB*8)+0; extern volatile near bit LATB1 @ ((unsigned)&LATB*8)+1; extern volatile near bit LATB2 @ ((unsigned)&LATB*8)+2; extern volatile near bit LATB3 @ ((unsigned)&LATB*8)+3; extern volatile near bit LATB4 @ ((unsigned)&LATB*8)+4; extern volatile near bit LATB5 @ ((unsigned)&LATB*8)+5; extern volatile near bit LATB6 @ ((unsigned)&LATB*8)+6; extern volatile near bit LATB7 @ ((unsigned)&LATB*8)+7; /* Definitions for LATA register */ extern volatile near bit LATA0 @ ((unsigned)&LATA*8)+0; extern volatile near bit LATA1 @ ((unsigned)&LATA*8)+1; extern volatile near bit LATA2 @ ((unsigned)&LATA*8)+2; extern volatile near bit LATA3 @ ((unsigned)&LATA*8)+3; extern volatile near bit LATA4 @ ((unsigned)&LATA*8)+4; extern volatile near bit LATA5 @ ((unsigned)&LATA*8)+5; extern volatile near bit LATA6 @ ((unsigned)&LATA*8)+6; #if defined(_18F4450) /* Definitions for PORTE register */ extern volatile near bit RE0 @ ((unsigned)&PORTE*8)+0; extern volatile near bit RE1 @ ((unsigned)&PORTE*8)+1; extern volatile near bit RE2 @ ((unsigned)&PORTE*8)+2; #endif extern volatile near bit RE3 @ ((unsigned)&PORTE*8)+3; #if defined(_18F4450) /* Definitions for PORTD register */ extern volatile near bit RD0 @ ((unsigned)&PORTD*8)+0; extern volatile near bit RD1 @ ((unsigned)&PORTD*8)+1; extern volatile near bit RD2 @ ((unsigned)&PORTD*8)+2; extern volatile near bit RD3 @ ((unsigned)&PORTD*8)+3; extern volatile near bit RD4 @ ((unsigned)&PORTD*8)+4; extern volatile near bit RD5 @ ((unsigned)&PORTD*8)+5; extern volatile near bit RD6 @ ((unsigned)&PORTD*8)+6; extern volatile near bit RD7 @ ((unsigned)&PORTD*8)+7; #endif /* Definitions for PORTC register */ extern volatile near bit RC0 @ ((unsigned)&PORTC*8)+0; extern volatile near bit RC1 @ ((unsigned)&PORTC*8)+1; extern volatile near bit RC2 @ ((unsigned)&PORTC*8)+2; extern volatile near bit RC4 @ ((unsigned)&PORTC*8)+4; extern volatile near bit RC5 @ ((unsigned)&PORTC*8)+5; extern volatile near bit RC6 @ ((unsigned)&PORTC*8)+6; extern volatile near bit RC7 @ ((unsigned)&PORTC*8)+7; /* Definitions for PORTB register */ extern volatile near bit RB0 @ ((unsigned)&PORTB*8)+0; extern volatile near bit RB1 @ ((unsigned)&PORTB*8)+1; extern volatile near bit RB2 @ ((unsigned)&PORTB*8)+2; extern volatile near bit RB3 @ ((unsigned)&PORTB*8)+3; extern volatile near bit RB4 @ ((unsigned)&PORTB*8)+4; extern volatile near bit RB5 @ ((unsigned)&PORTB*8)+5; extern volatile near bit RB6 @ ((unsigned)&PORTB*8)+6; extern volatile near bit RB7 @ ((unsigned)&PORTB*8)+7; /* Definitions for PORTA register */ extern volatile near bit RA0 @ ((unsigned)&PORTA*8)+0; extern volatile near bit RA1 @ ((unsigned)&PORTA*8)+1; extern volatile near bit RA2 @ ((unsigned)&PORTA*8)+2; extern volatile near bit RA3 @ ((unsigned)&PORTA*8)+3; extern volatile near bit RA4 @ ((unsigned)&PORTA*8)+4; extern volatile near bit RA5 @ ((unsigned)&PORTA*8)+5; extern volatile near bit RA6 @ ((unsigned)&PORTA*8)+6; /* Definitions for UEP15 register */ extern volatile near bit EPSTALL15 @ ((unsigned)&UEP15*8)+0; extern near bit EPINEN15 @ ((unsigned)&UEP15*8)+1; extern near bit EPOUTEN15 @ ((unsigned)&UEP15*8)+2; extern near bit EPCONDIS15 @ ((unsigned)&UEP15*8)+3; extern near bit EPHSHK15 @ ((unsigned)&UEP15*8)+4; /* Definitions for UEP14 register */ extern volatile near bit EPSTALL14 @ ((unsigned)&UEP14*8)+0; extern near bit EPINEN14 @ ((unsigned)&UEP14*8)+1; extern near bit EPOUTEN14 @ ((unsigned)&UEP14*8)+2; extern near bit EPCONDIS14 @ ((unsigned)&UEP14*8)+3; extern near bit EPHSHK14 @ ((unsigned)&UEP14*8)+4; /* Definitions for UEP13 register */ extern volatile near bit EPSTALL13 @ ((unsigned)&UEP13*8)+0; extern near bit EPINEN13 @ ((unsigned)&UEP13*8)+1; extern near bit EPOUTEN13 @ ((unsigned)&UEP13*8)+2; extern near bit EPCONDIS13 @ ((unsigned)&UEP13*8)+3; extern near bit EPHSHK13 @ ((unsigned)&UEP13*8)+4; /* Definitions for UEP12 register */ extern volatile near bit EPSTALL12 @ ((unsigned)&UEP12*8)+0; extern near bit EPINEN12 @ ((unsigned)&UEP12*8)+1; extern near bit EPOUTEN12 @ ((unsigned)&UEP12*8)+2; extern near bit EPCONDIS12 @ ((unsigned)&UEP12*8)+3; extern near bit EPHSHK12 @ ((unsigned)&UEP12*8)+4; /* Definitions for UEP11 register */ extern volatile near bit EPSTALL11 @ ((unsigned)&UEP11*8)+0; extern near bit EPINEN11 @ ((unsigned)&UEP11*8)+1; extern near bit EPOUTEN11 @ ((unsigned)&UEP11*8)+2; extern near bit EPCONDIS11 @ ((unsigned)&UEP11*8)+3; extern near bit EPHSHK11 @ ((unsigned)&UEP11*8)+4; /* Definitions for UEP10 register */ extern volatile near bit EPSTALL10 @ ((unsigned)&UEP10*8)+0; extern near bit EPINEN10 @ ((unsigned)&UEP10*8)+1; extern near bit EPOUTEN10 @ ((unsigned)&UEP10*8)+2; extern near bit EPCONDIS10 @ ((unsigned)&UEP10*8)+3; extern near bit EPHSHK10 @ ((unsigned)&UEP10*8)+4; /* Definitions for UEP9 register */ extern volatile near bit EPSTALL9 @ ((unsigned)&UEP9*8)+0; extern near bit EPINEN9 @ ((unsigned)&UEP9*8)+1; extern near bit EPOUTEN9 @ ((unsigned)&UEP9*8)+2; extern near bit EPCONDIS9 @ ((unsigned)&UEP9*8)+3; extern near bit EPHSHK9 @ ((unsigned)&UEP9*8)+4; /* Definitions for UEP8 register */ extern volatile near bit EPSTALL8 @ ((unsigned)&UEP8*8)+0; extern near bit EPINEN8 @ ((unsigned)&UEP8*8)+1; extern near bit EPOUTEN8 @ ((unsigned)&UEP8*8)+2; extern near bit EPCONDIS8 @ ((unsigned)&UEP8*8)+3; extern near bit EPHSHK8 @ ((unsigned)&UEP8*8)+4; /* Definitions for UEP7 register */ extern volatile near bit EPSTALL7 @ ((unsigned)&UEP7*8)+0; extern near bit EPINEN7 @ ((unsigned)&UEP7*8)+1; extern near bit EPOUTEN7 @ ((unsigned)&UEP7*8)+2; extern near bit EPCONDIS7 @ ((unsigned)&UEP7*8)+3; extern near bit EPHSHK7 @ ((unsigned)&UEP7*8)+4; /* Definitions for UEP6 register */ extern volatile near bit EPSTALL6 @ ((unsigned)&UEP6*8)+0; extern near bit EPINEN6 @ ((unsigned)&UEP6*8)+1; extern near bit EPOUTEN6 @ ((unsigned)&UEP6*8)+2; extern near bit EPCONDIS6 @ ((unsigned)&UEP6*8)+3; extern near bit EPHSHK6 @ ((unsigned)&UEP6*8)+4; /* Definitions for UEP5 register */ extern volatile near bit EPSTALL5 @ ((unsigned)&UEP5*8)+0; extern near bit EPINEN5 @ ((unsigned)&UEP5*8)+1; extern near bit EPOUTEN5 @ ((unsigned)&UEP5*8)+2; extern near bit EPCONDIS5 @ ((unsigned)&UEP5*8)+3; extern near bit EPHSHK5 @ ((unsigned)&UEP5*8)+4; /* Definitions for UEP4 register */ extern volatile near bit EPSTALL4 @ ((unsigned)&UEP4*8)+0; extern near bit EPINEN4 @ ((unsigned)&UEP4*8)+1; extern near bit EPOUTEN4 @ ((unsigned)&UEP4*8)+2; extern near bit EPCONDIS4 @ ((unsigned)&UEP4*8)+3; extern near bit EPHSHK4 @ ((unsigned)&UEP4*8)+4; /* Definitions for UEP3 register */ extern volatile near bit EPSTALL3 @ ((unsigned)&UEP3*8)+0; extern near bit EPINEN3 @ ((unsigned)&UEP3*8)+1; extern near bit EPOUTEN3 @ ((unsigned)&UEP3*8)+2; extern near bit EPCONDIS3 @ ((unsigned)&UEP3*8)+3; extern near bit EPHSHK3 @ ((unsigned)&UEP3*8)+4; /* Definitions for UEP2 register */ extern volatile near bit EPSTALL2 @ ((unsigned)&UEP2*8)+0; extern near bit EPINEN2 @ ((unsigned)&UEP2*8)+1; extern near bit EPOUTEN2 @ ((unsigned)&UEP2*8)+2; extern near bit EPCONDIS2 @ ((unsigned)&UEP2*8)+3; extern near bit EPHSHK2 @ ((unsigned)&UEP2*8)+4; /* Definitions for UEP1 register */ extern volatile near bit EPSTALL1 @ ((unsigned)&UEP1*8)+0; extern near bit EPINEN1 @ ((unsigned)&UEP1*8)+1; extern near bit EPOUTEN1 @ ((unsigned)&UEP1*8)+2; extern near bit EPCONDIS1 @ ((unsigned)&UEP1*8)+3; extern near bit EPHSHK1 @ ((unsigned)&UEP1*8)+4; /* Definitions for UEP0 register */ extern volatile near bit EPSTALL0 @ ((unsigned)&UEP0*8)+0; extern near bit EPINEN0 @ ((unsigned)&UEP0*8)+1; extern near bit EPOUTEN0 @ ((unsigned)&UEP0*8)+2; extern near bit EPCONDIS0 @ ((unsigned)&UEP0*8)+3; extern near bit EPHSHK0 @ ((unsigned)&UEP0*8)+4; /* Definitions for UCFG register */ extern near bit PPB0 @ ((unsigned)&UCFG*8)+0; extern near bit PPB1 @ ((unsigned)&UCFG*8)+1; extern near bit FSEN @ ((unsigned)&UCFG*8)+2; extern near bit UTRDIS @ ((unsigned)&UCFG*8)+3; extern near bit UPUEN @ ((unsigned)&UCFG*8)+4; extern near bit UOEMON @ ((unsigned)&UCFG*8)+6; extern near bit UTEYE @ ((unsigned)&UCFG*8)+7; /* Definitions for UADDR register */ extern near bit ADDR0 @ ((unsigned)&UADDR*8)+0; extern near bit ADDR1 @ ((unsigned)&UADDR*8)+1; extern near bit ADDR2 @ ((unsigned)&UADDR*8)+2; extern near bit ADDR3 @ ((unsigned)&UADDR*8)+3; extern near bit ADDR4 @ ((unsigned)&UADDR*8)+4; extern near bit ADDR5 @ ((unsigned)&UADDR*8)+5; extern near bit ADDR6 @ ((unsigned)&UADDR*8)+6; /* Definitions for UCON register */ extern near bit SUSPND @ ((unsigned)&UCON*8)+1; extern near bit RESUME @ ((unsigned)&UCON*8)+2; extern volatile near bit USBEN @ ((unsigned)&UCON*8)+3; extern volatile near bit PKTDIS @ ((unsigned)&UCON*8)+4; extern volatile near bit SE0 @ ((unsigned)&UCON*8)+5; extern volatile near bit PPBRST @ ((unsigned)&UCON*8)+6; /* Definitions for USTAT register */ extern volatile near bit PPBI @ ((unsigned)&USTAT*8)+1; extern volatile near bit DIR @ ((unsigned)&USTAT*8)+2; extern volatile near bit ENDP0 @ ((unsigned)&USTAT*8)+3; extern volatile near bit ENDP1 @ ((unsigned)&USTAT*8)+4; extern volatile near bit ENDP2 @ ((unsigned)&USTAT*8)+5; extern volatile near bit ENDP3 @ ((unsigned)&USTAT*8)+6; /* Definitions for UEIE register */ extern near bit PIDEE @ ((unsigned)&UEIE*8)+0; extern near bit CRC5EE @ ((unsigned)&UEIE*8)+1; extern near bit CRC16EE @ ((unsigned)&UEIE*8)+2; extern near bit DFN8EE @ ((unsigned)&UEIE*8)+3; extern near bit BTOEE @ ((unsigned)&UEIE*8)+4; extern near bit BTSEE @ ((unsigned)&UEIE*8)+7; /* Definitions for UEIR register */ extern volatile near bit PIDEF @ ((unsigned)&UEIR*8)+0; extern volatile near bit CRC5EF @ ((unsigned)&UEIR*8)+1; extern volatile near bit CRC16EF @ ((unsigned)&UEIR*8)+2; extern volatile near bit DFN8EF @ ((unsigned)&UEIR*8)+3; extern volatile near bit BTOEF @ ((unsigned)&UEIR*8)+4; extern volatile near bit BTSEF @ ((unsigned)&UEIR*8)+7; /* Definitions for UIE register */ extern near bit URSTIE @ ((unsigned)&UIE*8)+0; extern near bit UERRIE @ ((unsigned)&UIE*8)+1; extern near bit ACTVIE @ ((unsigned)&UIE*8)+2; extern near bit TRNIE @ ((unsigned)&UIE*8)+3; extern near bit IDLEIE @ ((unsigned)&UIE*8)+4; extern near bit STALLIE @ ((unsigned)&UIE*8)+5; extern near bit SOFIE @ ((unsigned)&UIE*8)+6; /* Definitions for UIR register */ extern volatile near bit URSTIF @ ((unsigned)&UIR*8)+0; extern volatile near bit UERRIF @ ((unsigned)&UIR*8)+1; extern volatile near bit ACTVIF @ ((unsigned)&UIR*8)+2; extern volatile near bit TRNIF @ ((unsigned)&UIR*8)+3; extern volatile near bit IDLEIF @ ((unsigned)&UIR*8)+4; extern volatile near bit STALLIF @ ((unsigned)&UIR*8)+5; extern volatile near bit SOFIF @ ((unsigned)&UIR*8)+6; // Configuration Bit Values // Configuration register 1 // USB Clock Selection #define USBPLL 0xFFDF // clk src from 96MHz PLL/2 #define USBOSC 0xFFFF // clk src from OSC1/OSC2 // CPU Sys CLK Select #define CPUDIV4 0xFFE7 // div by 4 #define CPUDIV3 0xFFEF // div by 3 #define CPUDIV2 0xFFF7 // div by 2 #define CPUDIV1 0xFFFF // no divide // OSC Select #define PLLDIV12 0xFFFF // div by 12 {48MHz input} #define PLLDIV10 0xFFFE // div by 10 {40MHz input} #define PLLDIV6 0xFFFD // div by 6 {24MHz input} #define PLLDIV5 0xFFFC // div by 5 {20MHz input} #define PLLDIV4 0xFFFB // div by 4 {16MHz input} #define PLLDIV3 0xFFFA // div by 3 {12MHz input} #define PLLDIV2 0xFFF9 // div by 2 {8MHz input} #define PLLDIV1 0xFFF8 // no divide {4MHz input} // Oscillator #define HSPLL 0xF6FF // HS: HS+PLL, USB-HS #define HS 0xF4FF // HS: USB-HS #define INT_USBHS 0xF3FF // INTOSC: USB-HS #define INT_USBXT 0xF2FF // INTOSC: USB-XT #define INTCLKO 0xF1FF // INTOSC: INTOSC+CLK0{RA6}, USB-EC #define INTIO 0xF0FF // INTOSC: INTOSC+RA6, USB-EC #define ECPLLCLKO 0xFFFF // EC: EC+PLL, EC+PLL+CLKO{RA6}, USB-EC #define ECPLLIO 0xFEFF // EC: EC+PLL, EC+PLL+RA6, USB-EC #define ECCLKO 0xFDFF // EC: EC+CLKO{RA6}, USB-EC #define ECIO 0xFCFF // EC: EC+RA6, USB-EC #define XTPLL 0xFAFF // XT: XT+PLL, USB-XT #define XT 0xF8FF // XT: USB-XT // Fail-Safe Clock Monitor Enable #define FCMDIS 0xFFFF // Disabled #define FCMEN 0xBFFF // Enabled // Internal External Switch Over Mode #define IESODIS 0xFFFF // Disabled #define IESOEN 0x7FFF // Enabled // Configuration register 2 // USB Voltage Regulator #define VREGEN 0xFFDF // Enabled #define VREGDIS 0xFFFF // Disabled // Power Up Timer #define PWRTDIS 0xFFFF // Disabled #define PWRTEN 0xFFFE // Enabled // Brown Out Detect #define BOREN 0xFFFF // Enabled in hardware, SBOREN disabled #define BOREN_XSLP 0xFFFD // Enabled while active,disabled in SLEEP,SBOREN disabled #define SWBOREN 0xFFFB // Controlled with SBOREN bit #define BORDIS 0xFFF9 // Disabled in hardware, SBOREN disabled // Brown Out Voltage #define BORV20 0xFFFF // 2.0V #define BORV27 0xFFF7 // 2.7V #define BORV42 0xFFEF // 4.2V #define BORV45 0xFFE7 // 4.5V // Watchdog Timer #define WDTEN 0xFFFF // Enabled #define WDTDIS 0xFEFF // Disabled-Controlled by SWDTEN bit // Watchdog Postscaler #define WDTPS32K 0xFFFF // 1:32768 #define WDTPS16K 0xFDFF // 1:16384 #define WDTPS8K 0xFBFF // 1:8192 #define WDTPS4K 0xF9FF // 1:4096 #define WDTPS2K 0xF7FF // 1:2048 #define WDTPS1K 0xF5FF // 1:1024 #define WDTPS512 0xF3FF // 1:512 #define WDTPS256 0xF1FF // 1:256 #define WDTPS128 0xEFFF // 1:128 #define WDTPS64 0xEDFF // 1:64 #define WDTPS32 0xEBFF // 1:32 #define WDTPS16 0xE9FF // 1:16 #define WDTPS8 0xE7FF // 1:8 #define WDTPS4 0xE5FF // 1:4 #define WDTPS2 0xE3FF // 1:2 #define WDTPS1 0xE1FF // 1:1 // Configuration register 3 // PortB A/D Enable #define PBANALOG 0xFFFF // PORTB<4:0> configured as analog inputs on RESET #define PBDIGITAL 0xFDFF // PORTB<4:0> configured as digital I/O on RESET // Low Power Timer1 Osc enable #define LPT1EN 0xFBFF // Enabled #define LPT1DIS 0xFFFF // Disabled // Master Clear Enable #define MCLREN 0xFFFF // MCLR Enabled,RE3 Disabled #define MCLRDIS 0x7FFF // MCLR Disabled,RE3 Enabled // Configuration register 4 // Extended CPU Enable #define XINSTEN 0xFFBF // Enabled #define XINSTDIS 0xFFFF // Disabled // Stack Overflow Reset #define STVREN 0xFFFF // Enabled #define STVRDIS 0xFFFE // Disabled // Low Voltage Program #define LVPEN 0xFFFF // Enabled #define LVPDIS 0xFFFB // Disabled // Boot Block Size #define BBSIZ2K 0xFFF7 // 2K Word Boot Block #define BBSIZ1K 0xFFFF // 1K Word Boot Block // Dedicated In-Circuit Port {ICD/ICSP} #if defined(_18F4450) #define ICPORTEN 0xFFDF // Enabled #define ICPORTDIS 0xFFFF // Disabled #endif // Background Debug #define DEBUGDIS 0xFFFF // Disabled #define DEBUGEN 0xFF7F // Enabled // Configuration register 5 // Code Protection #define UNPROTECT 0xFFFF // Disabled #define CP0 0xFFFE // Code Protect BOOT_TOP-01FFF #define CP1 0xFFFD // Code Protect 02000-03FFF #define CPD 0x7FFF // Data EE Read Protect #define CPB 0xBFFF // Code Protect Boot // Configuration register 6 // Write Protection #define UNPROTECT 0xFFFF // Disabled #define WP0 0xFFFE // Table Write Protect BOOT_TOP-01FFF #define WP1 0xFFFD // Table Write Protect 02000-03FFF #define WPD 0x7FFF // Data EE Write Protect #define WPB 0xBFFF // Table Write Protect Boot #define WPC 0xDFFF // Config. Write Protect // Configuration register 7 // Table Read Protection #define UNPROTECT 0xFFFF // Disabled #define TRP0 0xFFFE // Table Read Protect BOOT_TOP-01FFF #define TRP1 0xFFFD // Table Read Protect 02000-03FFF #define TRPB 0xBFFF // Table Read Protect Boot #endif