/******************************************************************************
* Register locations
******************************************************************************/
// Bank 0 registers --------
#define ERDPTL      0x00
#define ERDPTH      0x01
#define EWRPTL      0x02
#define EWRPTH      0x03
#define ETXSTL      0x04
#define ETXSTH      0x05
#define ETXNDL      0x06
#define ETXNDH      0x07
#define ERXSTL      0x08
#define ERXSTH      0x09
#define ERXNDL      0x0A
#define ERXNDH      0x0B
#define ERXRDPTL   0x0C
#define ERXRDPTH   0x0D
#define ERXWRPTL   0x0E
#define ERXWRPTH   0x0F
#define EDMASTL      0x10
#define EDMASTH      0x11
#define EDMANDL      0x12
#define EDMANDH      0x13
#define EDMADSTL   0x14
#define EDMADSTH   0x15
#define EDMACSL      0x16
#define EDMACSH      0x17
//#define         0x18
//#define         0x19
//#define r         0x1A
#define EIE         0x1B
#define EIR         0x1C
#define ESTAT      0x1D
#define ECON2      0x1E
#define ECON1      0x1F

// Bank 1 registers -----
#define EHT0      0x100
#define EHT1      0x101
#define EHT2      0x102
#define EHT3      0x103
#define EHT4      0x104
#define EHT5      0x105
#define EHT6      0x106
#define EHT7      0x107
#define EPMM0      0x108
#define EPMM1      0x109
#define EPMM2      0x10A
#define EPMM3      0x10B
#define EPMM4      0x10C
#define EPMM5      0x10D
#define EPMM6      0x10E
#define EPMM7      0x10F
#define EPMCSL      0x110
#define EPMCSH      0x111
//#define         0x112
//#define         0x113
#define EPMOL      0x114
#define EPMOH      0x115
//#define r         0x116
//#define r         0x117
#define ERXFCON      0x118
#define EPKTCNT      0x119
//#define r         0x11A
//#define EIE      0x11B
//#define EIR      0x11C
//#define ESTAT      0x11D
//#define ECON2      0x11E
//#define ECON1      0x11F

// Bank 2 registers -----
#define MACON1      0x200
#define MACON2         0x201
#define MACON3      0x202
#define MACON4      0x203
#define MABBIPG      0x204
//#define         0x205
#define MAIPGL      0x206
#define MAIPGH      0x207
#define MACLCON1   0x208
#define MACLCON2   0x209
#define MAMXFLL      0x20A
#define MAMXFLH      0x20B
//#define r         0x20C
//#define r         0x20D
//#define r         0x20E
//#define         0x20F
//#define r         0x210
//#define r         0x211
#define MICMD      0x212
//#define r         0x213
#define MIREGADR   0x214
//#define r         0x215
#define MIWRL      0x216
#define MIWRH      0x217
#define MIRDL      0x218
#define MIRDH      0x219
//#define r         0x21A
//#define EIE      0x21B
//#define EIR      0x21C
//#define ESTAT      0x21D
//#define ECON2      0x21E
//#define ECON1      0x21F

// Bank 3 registers -----
#define MAADR5      0x300
#define MAADR6      0x301
#define MAADR3      0x302
#define MAADR4      0x303
#define MAADR1      0x304
#define MAADR2      0x305
#define EBSTSD      0x306
#define EBSTCON      0x307
#define EBSTCSL      0x308
#define EBSTCSH      0x309
#define MISTAT      0x30A
//#define         0x30B
//#define         0x30C
//#define         0x30D
//#define         0x30E
//#define         0x30F
//#define         0x310
//#define         0x311
#define EREVID      0x312
//#define         0x313
//#define         0x314
#define ECOCON      0x315
//#define          0x316
#define EFLOCON      0x317
#define EPAUSL      0x318
#define EPAUSH      0x319
//#define r         0x31A
//#define EIE      0x31B
//#define EIR      0x31C
//#define ESTAT      0x31D
//#define ECON2      0x31E
//#define ECON1      0x31F

/******************************************************************************
* PH Register Locations
******************************************************************************/
#define PHCON1   0x00
#define PHSTAT1   0x01
#define PHID1   0x02
#define PHID2   0x03
#define PHCON2   0x10
#define PHSTAT2   0x11
#define PHIE   0x12
#define PHIR   0x13
#define PHLCON   0x14




#define WCR (0b01000000) // Write Control Register command
#define BFS (0b10000000) // Bit Field Set command
#define BFC (0b10100000) // Bit Field Clear command
#define RCR (0b00000000) // Read Control Register command
#define RBM (0b00111010) // Read Buffer Memory command
#define WBM (0b01111010) // Write Buffer Memory command
#define SRC (0b11111111) // System Reset command