cont_mod Project Status (10/28/2010 - 10:22:46)
Project File: cont_modN.xise Parser Errors: No Errors
Module Name: cont_mod Implementation State: Synthesized
Target Device: xc3s100e-5cp132
  • Errors:
 
Product Version:ISE 12.2
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 10/28/2010 - 10:22:46