;------------------------------------------------------------ ; Código assembler generado por Niple V5.6.3 ; Proyecto: ; Autor: Niple Software ; Fecha: 17/10/2013 ; PIC: 16F873A ; Velocidad de reloj: 4 Mhz ; Descripcion: ;------------------------------------------------------------ LIST P=PIC16F873A _XT_OSC equ 0x3FFD _DEBUG_OFF equ 0x3FFF _WDT_OFF equ 0x3FFB _PWRTE_ON equ 0x3FF7 _BODEN_OFF equ 0x3FBF _LVP_OFF equ 0x3F7F _CPD_OFF equ 0x3FFF _CP_OFF equ 0x3FFF _WRT_ENABLE_OFF equ 0x3DFF __config _XT_OSC & _DEBUG_OFF & _WDT_OFF & _PWRTE_ON & _BODEN_OFF & _LVP_OFF & _CPD_OFF & _WRT_ENABLE_OFF & _CP_OFF ;------------------------------------------------------------ ; Declaración de Registros ;------------------------------------------------------------ w equ 0x0000 status equ 0x0003 porta equ 0x0005 portb equ 0x0006 portc equ 0x0007 pclath equ 0x000a tmr1l equ 0x000e tmr1h equ 0x000f tmr2 equ 0x0011 t2con equ 0x0012 ccpr1l equ 0x0015 ccp1con equ 0x0017 adresh equ 0x001e adcon0 equ 0x001f _np_temp1 equ 0x0029 _np_temp2 equ 0x002a _np_temp3 equ 0x002b _np_temp4 equ 0x002c _np_temp5 equ 0x002d temp1 equ 0x002e temp2 equ 0x002f _np_timers equ 0x0030 _np_t2_ini equ 0x0031 _np_t2_cint_l equ 0x0032 _np_t2_cint_h equ 0x0033 _np_t2_cint1_l equ 0x0034 _np_t2_cint1_h equ 0x0035 trisa equ 0x0085 trisb equ 0x0086 trisc equ 0x0087 pr2 equ 0x0092 adresl equ 0x009e adcon1 equ 0x009f ;------------------------------------------------------------ ; Declaración de Bits ;------------------------------------------------------------ adfm equ 7 ; adon equ 0 ; c equ 0 ;carry / borrow bit go_done equ 2 ; rc4 equ 4 ;bit 4 del puerto c rp0 equ 5 ;registrer bank select bit rp1 equ 6 ;registrer bank select bit t2ckps0 equ 0 ;timer 2 clock prescaler select bit t2ckps1 equ 1 ;timer 2 clock prescaler select bit tmr2on equ 2 ;timer 2 on bit toutps0 equ 3 ;timer 2 output postscale select bit toutps1 equ 4 ;timer 2 output postscale select bit toutps2 equ 5 ;timer 2 output postscale select bit toutps3 equ 6 ;timer 2 output postscale select bit z equ 2 ;bit cero tiempo_t2 equ 2 ;bandera de temporizacion por tmr2 ;------------------------------------------------------------ ; Declaración de Registros EEPROM ;------------------------------------------------------------ ;------------------------------------------------------------ ; Inicio ;------------------------------------------------------------ org 0x00 goto paso2 ;------------------------------------------------------------ ; programa principal ;------------------------------------------------------------ paso2 bcf status,rp0 ;cambiar a banco 0 bcf status,rp1 clrf _np_temp1 clrf _np_temp2 clrf _np_temp3 clrf _np_temp4 clrf _np_temp5 clrf temp1 clrf temp2 clrf _np_timers clrf _np_t2_ini clrf _np_t2_cint_l clrf _np_t2_cint_h clrf _np_t2_cint1_l clrf _np_t2_cint1_h clrf porta movlw b'00000001' ;configurar el puerto a como xxsssssa bsf status,rp0 ;cambiar a banco 1 movwf trisa movlw b'10001110' ;configuracion a/d = dddda movwf adcon1 bcf status,rp0 ;cambiar a banco 0 clrf portb movlw b'00000000' ;configurar el puerto b como ssssssss bsf status,rp0 ;cambiar a banco 1 movwf trisb bcf status,rp0 ;cambiar a banco 0 clrf portc movlw b'00000000' ;configurar el puerto c como ssssssss bsf status,rp0 ;cambiar a banco 1 movwf trisc bcf status,rp0 ;cambiar a banco 0 bsf portc,rc4 paso6 bsf t2con,tmr2on ;activar el tmr2 movlw b'01000001' ;conversión movwf adcon0 bsf status,rp0 ;cambiar a banco 1 bsf adcon1,adfm ;alinear el resultado a la derecha bcf status,rp0 ;cambiar a banco 0 clrf _np_temp3 clrf _np_temp4 movlw .2 movwf _np_temp5 paso7_ciclos call leer_ad ;llamada a rutina leer_ad bsf status,rp0 ;cambiar a banco 1 movf adresl,w ;recuperar el registro bajo de la conversion a/d bcf status,rp0 ;cambiar a banco 0 movwf temp2 movf adresh,w ;recuperar el registro alto de la conversion a/d movwf temp1 movf temp2,w addwf _np_temp4,1 btfsc status,c incf _np_temp3,1 movf temp1,w addwf _np_temp3,1 decfsz _np_temp5,1 goto paso7_ciclos bcf status,c rrf _np_temp3,1 rrf _np_temp4,1 movf _np_temp3,w movwf temp1 movf _np_temp4,w movwf temp2 bcf t2con,t2ckps0 ;tmr2 - configurar preescalado a 16 bsf t2con,t2ckps1 bcf t2con,toutps0 ;tmr2 - configurar postdivisor a 1 bcf t2con,toutps1 bcf t2con,toutps2 bcf t2con,toutps3 clrf tmr2 movlw .255 bsf status,rp0 ;cambiar a banco 1 movwf pr2 movlw .1 bcf status,rp0 ;cambiar a banco 0 movwf _np_t2_cint_l movwf _np_t2_cint1_l clrf _np_t2_cint_h clrf _np_t2_cint1_h movlw d'124' ;ccp1-pwm. frecuencia = 500hz bsf status,rp0 ;cambiar a banco 1 movwf pr2 movlw b'00100101' ;pwm1 - control 150 bcf status,rp0 ;cambiar a banco 0 movwf ccpr1l movlw b'00101100' ;bits bajos de ancho pulso (5-4) y activar el modo pwm movwf ccp1con goto paso6 ;cierra el ciclo ;------------------------------------------------------------ ; Declaración de Subrutinas ;------------------------------------------------------------ leer_ad ;realizar conversion a/d movlw .200 movwf _np_temp1 leer_ad_esperar decfsz _np_temp1,1 goto leer_ad_esperar bsf adcon0,go_done nop nop leer_ad_esperar_fin btfsc adcon0,go_done goto leer_ad_esperar_fin return ;------------------------------------------------------------ ; DATOS EN MEMORIA EEPROM ;------------------------------------------------------------ org 0x2100 data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff data 0xff End