| 65 |
PLIB_USART_BaudRateSet(USART_ID_2, SYS_CLK_PeripheralFrequencyGet(CLK_BUS_PERIPHERAL_2), 38400); |
= |
65 |
PLIB_USART_BaudRateSet(USART_ID_2, SYS_CLK_PeripheralFrequencyGet(CLK_BUS_PERIPHERAL_2), 38400); |
| 66 |
PLIB_USART_HandshakeModeSelect(USART_ID_2, USART_HANDSHAKE_MODE_FLOW_CONTROL); |
|
66 |
PLIB_USART_HandshakeModeSelect(USART_ID_2, USART_HANDSHAKE_MODE_FLOW_CONTROL); |
| 67 |
PLIB_USART_OperationModeSelect(USART_ID_2, USART_ENABLE_TX_RX_USED); |
|
67 |
PLIB_USART_OperationModeSelect(USART_ID_2, USART_ENABLE_TX_RX_USED); |
| 68 |
PLIB_USART_LineControlModeSelect(USART_ID_2, USART_8N1); |
|
68 |
PLIB_USART_LineControlModeSelect(USART_ID_2, USART_8N1); |
| 69 |
PLIB_USART_TransmitterEnable(USART_ID_2); |
|
69 |
PLIB_USART_TransmitterEnable(USART_ID_2); |
| 70 |
PLIB_USART_TransmitterInterruptModeSelect(USART_ID_2, USART_TRANSMIT_FIFO_NOT_FULL); |
|
70 |
PLIB_USART_TransmitterInterruptModeSelect(USART_ID_2, USART_TRANSMIT_FIFO_NOT_FULL); |
| |
|
-+ |
71 |
PLIB_USART_ReceiverEnable(USART_ID_2); |
| |
|
|
72 |
PLIB_USART_ReceiverInterruptModeSelect(USART_ID_2, USART_RECEIVE_FIFO_ONE_CHAR); |
| |
|
|
73 |
|
| |
|
|
74 |
/* Initialize TX interrupt */ |
| |
|
|
75 |
PLIB_INT_SourceEnable(INT_ID_0, INT_SOURCE_USART_2_TRANSMIT); |
| |
|
|
76 |
PLIB_INT_VectorPrioritySet(INT_ID_0, INT_VECTOR_UART2_TX, INT_PRIORITY_LEVEL1); |
| |
|
|
77 |
PLIB_INT_VectorSubPrioritySet(INT_ID_0, INT_VECTOR_UART2_TX, INT_SUBPRIORITY_LEVEL0); |
| |
|
|
78 |
|
| |
|
|
79 |
/* Initialize RX interrupt */ |
| |
|
|
80 |
PLIB_INT_SourceEnable(INT_ID_0, INT_SOURCE_USART_2_RECEIVE); |
| |
|
|
81 |
PLIB_INT_VectorPrioritySet(INT_ID_0, INT_VECTOR_UART2_RX, INT_PRIORITY_LEVEL1); |
| |
|
|
82 |
PLIB_INT_VectorSubPrioritySet(INT_ID_0, INT_VECTOR_UART2_RX, INT_SUBPRIORITY_LEVEL0); |
| |
|
|
83 |
|
| |
|
|
84 |
/* Initialize Fault interrupt */ |
| |
|
|
85 |
PLIB_INT_SourceEnable(INT_ID_0, INT_SOURCE_USART_2_ERROR); |
| |
|
|
86 |
PLIB_INT_VectorPrioritySet(INT_ID_0, INT_VECTOR_UART2_FAULT, INT_PRIORITY_LEVEL1); |
| |
|
|
87 |
PLIB_INT_VectorSubPrioritySet(INT_ID_0, INT_VECTOR_UART2_FAULT, INT_SUBPRIORITY_LEVEL0); |
| 71 |
|
= |
88 |
|
| 72 |
PLIB_USART_Enable(USART_ID_2); |
|
89 |
PLIB_USART_Enable(USART_ID_2); |
| 73 |
} |
|
90 |
} |
| 74 |
|
|
91 |
|
| 75 |
|
|
92 |
|
| 76 |
|
|
93 |
|
| 84 |
#define SYS_CLK_BUS_PERIPHERAL_5 100000000ul |
= |
84 |
#define SYS_CLK_BUS_PERIPHERAL_5 100000000ul |
| 85 |
#define SYS_CLK_BUS_PERIPHERAL_7 200000000ul |
|
85 |
#define SYS_CLK_BUS_PERIPHERAL_7 200000000ul |
| 86 |
#define SYS_CLK_BUS_REFERENCE_1 10000000ul |
|
86 |
#define SYS_CLK_BUS_REFERENCE_1 10000000ul |
| 87 |
#define SYS_CLK_CONFIG_PRIMARY_XTAL 24000000ul |
|
87 |
#define SYS_CLK_CONFIG_PRIMARY_XTAL 24000000ul |
| 88 |
#define SYS_CLK_CONFIG_SECONDARY_XTAL 0ul |
|
88 |
#define SYS_CLK_CONFIG_SECONDARY_XTAL 0ul |
| 89 |
|
|
89 |
|
| |
|
-+ |
90 |
/*** Interrupt System Service Configuration ***/ |
| |
|
|
91 |
|
| |
|
|
92 |
#define SYS_INT true |
| |
|
|
93 |
|
| |
|
|
94 |
|
| 90 |
|
= |
95 |
|
| 91 |
|
|
96 |
|
| 92 |
|
|
97 |
|
| 93 |
#define SYS_PORT_B_ANSEL 0xbffb |
|
98 |
#define SYS_PORT_B_ANSEL 0xbffb |
| 94 |
#define SYS_PORT_B_TRIS 0xffff |
|
99 |
#define SYS_PORT_B_TRIS 0xffff |
| 95 |
#define SYS_PORT_B_ODC 0x0 |
|
100 |
#define SYS_PORT_B_ODC 0x0 |
| 50 |
#include <stddef.h> |
= |
50 |
#include <stddef.h> |
| 51 |
#include "system/common/sys_common.h" |
|
51 |
#include "system/common/sys_common.h" |
| 52 |
#include "system/common/sys_module.h" |
|
52 |
#include "system/common/sys_module.h" |
| 53 |
#include "system/clk/sys_clk.h" |
|
53 |
#include "system/clk/sys_clk.h" |
| 54 |
#include "framework/system/clk/sys_clk_static.h" |
|
54 |
#include "framework/system/clk/sys_clk_static.h" |
| 55 |
#include "system/devcon/sys_devcon.h" |
|
55 |
#include "system/devcon/sys_devcon.h" |
| |
|
-+ |
56 |
#include "system/int/sys_int.h" |
| 56 |
#include "framework/driver/usart/drv_usart_static.h" |
= |
57 |
#include "framework/driver/usart/drv_usart_static.h" |
| 57 |
#include "peripheral/usart/plib_usart.h" |
|
58 |
#include "peripheral/usart/plib_usart.h" |
| |
|
-+ |
59 |
#include "peripheral/int/plib_int.h" |
| 58 |
#include "system/ports/sys_ports.h" |
= |
60 |
#include "system/ports/sys_ports.h" |
| 59 |
#include "framework/driver/spi/drv_spi_static.h" |
|
61 |
#include "framework/driver/spi/drv_spi_static.h" |
| 60 |
|
|
62 |
|
| 61 |
|
|
63 |
|
| 62 |
|
|
64 |
|
| 63 |
|
|
65 |
|
| 67 |
|
= |
67 |
|
| 68 |
|
|
68 |
|
| 69 |
|
|
69 |
|
| 70 |
|
|
70 |
|
| 71 |
|
|
71 |
|
| 72 |
|
|
72 |
|
| |
|
-+ |
73 |
|
| |
|
|
74 |
void __ISR(_UART2_TX_VECTOR, ipl1) _IntHandlerDrvUsartTransmitInstance0(void) |
| |
|
|
75 |
{ |
| |
|
|
76 |
|
| |
|
|
77 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
78 |
|
| |
|
|
79 |
/* Clear pending interrupt */ |
| |
|
|
80 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_2_TRANSMIT); |
| |
|
|
81 |
} |
| |
|
|
82 |
void __ISR(_UART2_RX_VECTOR, ipl1) _IntHandlerDrvUsartReceiveInstance0(void) |
| |
|
|
83 |
{ |
| |
|
|
84 |
|
| |
|
|
85 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
86 |
|
| |
|
|
87 |
/* Clear pending interrupt */ |
| |
|
|
88 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_2_RECEIVE); |
| |
|
|
89 |
} |
| |
|
|
90 |
void __ISR(_UART2_FAULT_VECTOR, ipl1) _IntHandlerDrvUsartErrorInstance0(void) |
| |
|
|
91 |
{ |
| |
|
|
92 |
|
| |
|
|
93 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
94 |
|
| |
|
|
95 |
/* Clear pending interrupt */ |
| |
|
|
96 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_2_ERROR); |
| |
|
|
97 |
} |
| |
|
|
98 |
|
| |
|
|
99 |
|
| |
|
|
100 |
|
| |
|
|
101 |
|
| |
|
|
102 |
|
| |
|
|
103 |
|
| |
|
|
104 |
|
| |
|
|
105 |
|
| |
|
|
106 |
|
| |
|
|
107 |
|
| 73 |
|
= |
108 |
|
| 74 |
|
|
109 |
|
| 75 |
|
|
110 |
|
| 76 |
|
|
111 |
|
| 77 |
|
|
112 |
|