| 66 |
PLIB_USART_HandshakeModeSelect(USART_ID_2, USART_HANDSHAKE_MODE_FLOW_CONTROL); |
= |
66 |
PLIB_USART_HandshakeModeSelect(USART_ID_2, USART_HANDSHAKE_MODE_FLOW_CONTROL); |
| 67 |
PLIB_USART_OperationModeSelect(USART_ID_2, USART_ENABLE_TX_RX_USED); |
|
67 |
PLIB_USART_OperationModeSelect(USART_ID_2, USART_ENABLE_TX_RX_USED); |
| 68 |
PLIB_USART_LineControlModeSelect(USART_ID_2, USART_8N1); |
|
68 |
PLIB_USART_LineControlModeSelect(USART_ID_2, USART_8N1); |
| 69 |
PLIB_USART_TransmitterEnable(USART_ID_2); |
|
69 |
PLIB_USART_TransmitterEnable(USART_ID_2); |
| 70 |
PLIB_USART_TransmitterInterruptModeSelect(USART_ID_2, USART_TRANSMIT_FIFO_NOT_FULL); |
|
70 |
PLIB_USART_TransmitterInterruptModeSelect(USART_ID_2, USART_TRANSMIT_FIFO_NOT_FULL); |
| 71 |
|
|
71 |
|
| |
|
-+ |
72 |
/* Initialize TX interrupt */ |
| |
|
|
73 |
PLIB_INT_SourceEnable(INT_ID_0, INT_SOURCE_USART_2_TRANSMIT); |
| |
|
|
74 |
PLIB_INT_VectorPrioritySet(INT_ID_0, INT_VECTOR_UART2_TX, INT_PRIORITY_LEVEL1); |
| |
|
|
75 |
PLIB_INT_VectorSubPrioritySet(INT_ID_0, INT_VECTOR_UART2_TX, INT_SUBPRIORITY_LEVEL0); |
| |
|
|
76 |
|
| |
|
|
77 |
|
| |
|
|
78 |
/* Initialize Fault interrupt */ |
| |
|
|
79 |
PLIB_INT_SourceEnable(INT_ID_0, INT_SOURCE_USART_2_ERROR); |
| |
|
|
80 |
PLIB_INT_VectorPrioritySet(INT_ID_0, INT_VECTOR_UART2_FAULT, INT_PRIORITY_LEVEL1); |
| |
|
|
81 |
PLIB_INT_VectorSubPrioritySet(INT_ID_0, INT_VECTOR_UART2_FAULT, INT_SUBPRIORITY_LEVEL0); |
| |
|
|
82 |
|
| 72 |
PLIB_USART_Enable(USART_ID_2); |
= |
83 |
PLIB_USART_Enable(USART_ID_2); |
| 73 |
} |
|
84 |
} |
| 74 |
|
|
85 |
|
| 75 |
|
|
86 |
|
| 76 |
|
|
87 |
|
| 77 |
|
|
88 |
|
| |
| 96 |
{ |
= |
107 |
{ |
| 97 |
} |
|
108 |
} |
| 98 |
|
|
109 |
|
| 99 |
PLIB_USART_TransmitterByteSend(USART_ID_2, byte); |
|
110 |
PLIB_USART_TransmitterByteSend(USART_ID_2, byte); |
| 100 |
} |
|
111 |
} |
| 101 |
|
|
112 |
|
| |
|
-+ |
113 |
// ***************************************************************************** |
| |
|
|
114 |
// ***************************************************************************** |
| |
|
|
115 |
// Section: Instance 1 static driver functions |
| |
|
|
116 |
// ***************************************************************************** |
| |
|
|
117 |
// ***************************************************************************** |
| 102 |
|
= |
118 |
|
| |
|
-+ |
119 |
void DRV_USART1_Initialize(void) |
| |
|
|
120 |
{ |
| |
|
|
121 |
/* Initialize USART */ |
| |
|
|
122 |
PLIB_USART_BaudRateSet(USART_ID_3, SYS_CLK_PeripheralFrequencyGet(CLK_BUS_PERIPHERAL_2), 38400); |
| |
|
|
123 |
PLIB_USART_HandshakeModeSelect(USART_ID_3, USART_HANDSHAKE_MODE_FLOW_CONTROL); |
| |
|
|
124 |
PLIB_USART_OperationModeSelect(USART_ID_3, USART_ENABLE_TX_RX_USED); |
| |
|
|
125 |
PLIB_USART_LineControlModeSelect(USART_ID_3, USART_8N1); |
| |
|
|
126 |
PLIB_USART_ReceiverEnable(USART_ID_3); |
| |
|
|
127 |
PLIB_USART_ReceiverInterruptModeSelect(USART_ID_3, USART_RECEIVE_FIFO_ONE_CHAR); |
| |
|
|
128 |
|
| |
|
|
129 |
/* Initialize RX interrupt */ |
| |
|
|
130 |
PLIB_INT_SourceEnable(INT_ID_0, INT_SOURCE_USART_3_RECEIVE); |
| |
|
|
131 |
PLIB_INT_VectorPrioritySet(INT_ID_0, INT_VECTOR_UART3_RX, INT_PRIORITY_LEVEL1); |
| |
|
|
132 |
PLIB_INT_VectorSubPrioritySet(INT_ID_0, INT_VECTOR_UART3_RX, INT_SUBPRIORITY_LEVEL1); |
| |
|
|
133 |
|
| |
|
|
134 |
/* Initialize Fault interrupt */ |
| |
|
|
135 |
PLIB_INT_SourceEnable(INT_ID_0, INT_SOURCE_USART_3_ERROR); |
| |
|
|
136 |
PLIB_INT_VectorPrioritySet(INT_ID_0, INT_VECTOR_UART3_FAULT, INT_PRIORITY_LEVEL1); |
| |
|
|
137 |
PLIB_INT_VectorSubPrioritySet(INT_ID_0, INT_VECTOR_UART3_FAULT, INT_SUBPRIORITY_LEVEL1); |
| |
|
|
138 |
|
| |
|
|
139 |
PLIB_USART_Enable(USART_ID_3); |
| |
|
|
140 |
} |
| |
|
|
141 |
|
| |
|
|
142 |
|
| |
|
|
143 |
|
| |
|
|
144 |
|
| |
|
|
145 |
bool DRV_USART1_ReceiverBufferIsEmpty(void) |
| |
|
|
146 |
{ |
| |
|
|
147 |
return (!PLIB_USART_ReceiverDataIsAvailable(USART_ID_3)); |
| |
|
|
148 |
} |
| |
|
|
149 |
|
| |
|
|
150 |
uint8_t DRV_USART1_ReadByte(void) |
| |
|
|
151 |
{ |
| |
|
|
152 |
if(PLIB_USART_ReceiverOverrunHasOccurred(USART_ID_3)) |
| |
|
|
153 |
{ |
| |
|
|
154 |
PLIB_USART_ReceiverOverrunErrorClear(USART_ID_3); |
| |
|
|
155 |
} |
| |
|
|
156 |
|
| |
|
|
157 |
return (PLIB_USART_ReceiverByteReceive(USART_ID_3)); |
| |
|
|
158 |
} |
| |
|
|
159 |
|
| |
|
|
160 |
void DRV_USART1_WriteByte(const uint8_t byte) |
| |
|
|
161 |
{ |
| |
|
|
162 |
while(PLIB_USART_TransmitterBufferIsFull(USART_ID_3)) |
| |
|
|
163 |
{ |
| |
|
|
164 |
} |
| |
|
|
165 |
|
| |
|
|
166 |
PLIB_USART_TransmitterByteSend(USART_ID_3, byte); |
| |
|
|
167 |
} |
| |
|
|
168 |
|
| |
|
|
169 |
|
| 103 |
|
= |
170 |
|
| 104 |
|
|
171 |
|
| 105 |
|
|
172 |
|
| 58 |
|
= |
58 |
|
| 59 |
void DRV_USART0_Initialize(void); |
|
59 |
void DRV_USART0_Initialize(void); |
| 60 |
uint8_t DRV_USART0_ReadByte(void); |
|
60 |
uint8_t DRV_USART0_ReadByte(void); |
| 61 |
void DRV_USART0_WriteByte(const uint8_t byte); |
|
61 |
void DRV_USART0_WriteByte(const uint8_t byte); |
| 62 |
bool DRV_USART0_ReceiverBufferIsEmpty(void); |
|
62 |
bool DRV_USART0_ReceiverBufferIsEmpty(void); |
| 63 |
|
|
63 |
|
| |
|
-+ |
64 |
// ***************************************************************************** |
| |
|
|
65 |
// ***************************************************************************** |
| |
|
|
66 |
// Section: Interface Headers for Instance 1 for the static driver |
| |
|
|
67 |
// ***************************************************************************** |
| |
|
|
68 |
// ***************************************************************************** |
| |
|
|
69 |
|
| |
|
|
70 |
void DRV_USART1_Initialize(void); |
| |
|
|
71 |
uint8_t DRV_USART1_ReadByte(void); |
| |
|
|
72 |
void DRV_USART1_WriteByte(const uint8_t byte); |
| |
|
|
73 |
bool DRV_USART1_ReceiverBufferIsEmpty(void); |
| |
|
|
74 |
|
| 64 |
#endif |
= |
75 |
#endif |
| 65 |
|
|
76 |
|
| 66 |
|
|
77 |
|
| 67 |
|
|
78 |
|
| 68 |
|
|
79 |
|
| 108 |
PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNEN); |
= |
108 |
PLIB_PORTS_ChannelChangeNoticeEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNEN); |
| 109 |
PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNPU); |
|
109 |
PLIB_PORTS_ChannelChangeNoticePullUpEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNPU); |
| 110 |
PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNPD); |
|
110 |
PLIB_PORTS_ChannelChangeNoticePullDownEnable(PORTS_ID_0, PORT_CHANNEL_G, SYS_PORT_G_CNPD); |
| 111 |
|
|
111 |
|
| 112 |
|
|
112 |
|
| 113 |
PLIB_PORTS_RemapInput(PORTS_ID_0, INPUT_FUNC_SDI4, INPUT_PIN_RPD3 ); |
|
113 |
PLIB_PORTS_RemapInput(PORTS_ID_0, INPUT_FUNC_SDI4, INPUT_PIN_RPD3 ); |
| |
|
-+ |
114 |
PLIB_PORTS_RemapInput(PORTS_ID_0, INPUT_FUNC_U3RX, INPUT_PIN_RPB3 ); |
| 114 |
|
= |
115 |
|
| 115 |
|
|
116 |
|
| 116 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_U2TX, OUTPUT_PIN_RPB2 ); |
|
117 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_U2TX, OUTPUT_PIN_RPB2 ); |
| 117 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_SDO6, OUTPUT_PIN_RPC3 ); |
|
118 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_SDO6, OUTPUT_PIN_RPC3 ); |
| 118 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_SDO2, OUTPUT_PIN_RPE5 ); |
|
119 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_SDO2, OUTPUT_PIN_RPE5 ); |
| 119 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_SDO4, OUTPUT_PIN_RPD11 ); |
|
120 |
PLIB_PORTS_RemapOutput(PORTS_ID_0, OUTPUT_FUNC_SDO4, OUTPUT_PIN_RPD11 ); |
| 55 |
#include "system/devcon/sys_devcon.h" |
= |
55 |
#include "system/devcon/sys_devcon.h" |
| 56 |
#include "system/int/sys_int.h" |
|
56 |
#include "system/int/sys_int.h" |
| 57 |
#include "framework/driver/tmr/drv_tmr_static.h" |
|
57 |
#include "framework/driver/tmr/drv_tmr_static.h" |
| 58 |
#include "peripheral/int/plib_int.h" |
|
58 |
#include "peripheral/int/plib_int.h" |
| 59 |
#include "framework/driver/usart/drv_usart_static.h" |
|
59 |
#include "framework/driver/usart/drv_usart_static.h" |
| 60 |
#include "peripheral/usart/plib_usart.h" |
|
60 |
#include "peripheral/usart/plib_usart.h" |
| |
|
-+ |
61 |
#include "peripheral/int/plib_int.h" |
| 61 |
#include "system/ports/sys_ports.h" |
= |
62 |
#include "system/ports/sys_ports.h" |
| 62 |
#include "framework/driver/spi/drv_spi_static.h" |
|
63 |
#include "framework/driver/spi/drv_spi_static.h" |
| 63 |
|
|
64 |
|
| 64 |
|
|
65 |
|
| 65 |
|
|
66 |
|
| 66 |
|
|
67 |
|
| 73 |
void __ISR(_TIMER_1_VECTOR, ipl1) _IntHandlerDrvTmrInstance0(void) |
= |
73 |
void __ISR(_TIMER_1_VECTOR, ipl1) _IntHandlerDrvTmrInstance0(void) |
| 74 |
{ |
|
74 |
{ |
| 75 |
++PORTDbits.RD1; |
|
75 |
++PORTDbits.RD1; |
| 76 |
PLIB_INT_SourceFlagClear(INT_ID_0,INT_SOURCE_TIMER_1); |
|
76 |
PLIB_INT_SourceFlagClear(INT_ID_0,INT_SOURCE_TIMER_1); |
| 77 |
} |
|
77 |
} |
| 78 |
|
|
78 |
|
| |
|
-+ |
79 |
void __ISR(_UART2_TX_VECTOR, ipl1) _IntHandlerDrvUsartTransmitInstance0(void) |
| |
|
|
80 |
{ |
| |
|
|
81 |
|
| |
|
|
82 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
83 |
|
| |
|
|
84 |
/* Clear pending interrupt */ |
| |
|
|
85 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_2_TRANSMIT); |
| |
|
|
86 |
} |
| |
|
|
87 |
void __ISR(_UART2_RX_VECTOR, ipl1) _IntHandlerDrvUsartReceiveInstance0(void) |
| |
|
|
88 |
{ |
| |
|
|
89 |
|
| |
|
|
90 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
91 |
|
| |
|
|
92 |
/* Clear pending interrupt */ |
| |
|
|
93 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_2_RECEIVE); |
| |
|
|
94 |
} |
| |
|
|
95 |
void __ISR(_UART2_FAULT_VECTOR, ipl1) _IntHandlerDrvUsartErrorInstance0(void) |
| |
|
|
96 |
{ |
| |
|
|
97 |
|
| |
|
|
98 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
99 |
|
| |
|
|
100 |
/* Clear pending interrupt */ |
| |
|
|
101 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_2_ERROR); |
| |
|
|
102 |
} |
| |
|
|
103 |
|
| |
|
|
104 |
|
| |
|
|
105 |
|
| |
|
|
106 |
|
| |
|
|
107 |
void __ISR(_UART3_TX_VECTOR, ipl1) _IntHandlerDrvUsartTransmitInstance1(void) |
| |
|
|
108 |
{ |
| |
|
|
109 |
|
| |
|
|
110 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
111 |
|
| |
|
|
112 |
/* Clear pending interrupt */ |
| |
|
|
113 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_3_TRANSMIT); |
| |
|
|
114 |
} |
| |
|
|
115 |
void __ISR(_UART3_RX_VECTOR, ipl1) _IntHandlerDrvUsartReceiveInstance1(void) |
| |
|
|
116 |
{ |
| |
|
|
117 |
|
| |
|
|
118 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
119 |
++PORTDbits.RD2; |
| |
|
|
120 |
/* Clear pending interrupt */ |
| |
|
|
121 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_3_RECEIVE); |
| |
|
|
122 |
} |
| |
|
|
123 |
void __ISR(_UART3_FAULT_VECTOR, ipl1) _IntHandlerDrvUsartErrorInstance1(void) |
| |
|
|
124 |
{ |
| |
|
|
125 |
|
| |
|
|
126 |
/* TODO: Add code to process interrupt here */ |
| |
|
|
127 |
|
| |
|
|
128 |
/* Clear pending interrupt */ |
| |
|
|
129 |
PLIB_INT_SourceFlagClear(INT_ID_0, INT_SOURCE_USART_3_ERROR); |
| |
|
|
130 |
} |
| |
|
|
131 |
|
| |
|
|
132 |
|
| |
|
|
133 |
|
| |
|
|
134 |
|
| |
|
|
135 |
|
| |
|
|
136 |
|
| |
|
|
137 |
|
| |
|
|
138 |
|
| |
|
|
139 |
|
| 79 |
|
= |
140 |
|
| 80 |
|
|
141 |
|
| 81 |
|
|
142 |
|
| 82 |
|
|
143 |
|