BWRP	Boot Segment Write Protect
BWRP = ON	Enabled
BWRP = OFF	Disabled

BSS	Boot segment Protect
BSS = HI2K	High Security Boot Protect 000200h - 0015FEh
BSS = HI1K	High Security Boot Protect 000200h - 000AFEh
BSS = STD2K	Standard Security Boot Protect 000200h - 0015FEh
BSS = STD1K	Standard Security Boot Protect 000200h - 000AFEh
BSS = OFF	No boot program flash segment

GWRP	General Segment Write Protect
GWRP = ON	General segment is write-protected
GWRP = OFF	General segment may be written

GCP	General Segment Code Protect
GCP = ON	Standard security enabled
GCP = OFF	No Protection

FNOSC	Oscillator Select
FNOSC = FRC	Fast RC Oscillator (FRC)
FNOSC = FRCPLL	Fast RC Oscillator with Postscaler and PLL Module (FRCDIV+PLL)
FNOSC = PRI	Primary Oscillator (XT, HS, EC)
FNOSC = PRIPLL	Primary oscillator with PLL Module (HS+PLL, EC+PLL)
FNOSC = SOSC	Secondary oscillator (SOSC)
FNOSC = LPRC	Low Power RC oscillator (LPRC)
FNOSC = LPFRC	500kHz Low-Power FRC oscillator with Postscaler(LPFRCDIV)
FNOSC = FRCDIV	8MHz FRC oscillator With Postscaler (FRCDIV)

SOSCSRC	SOSC Source Type
SOSCSRC = DIG	Digital Mode for use with external source
SOSCSRC = ANA	Analog Mode for use with crystal

LPRCSEL	LPRC Oscillator Power and Accuracy
LPRCSEL = LP	Low Power, Low Accuracy Mode
LPRCSEL = HP	High Power, High Accuracy Mode

IESO	Internal External Switch Over bit
IESO = OFF	Internal External Switchover mode disabled (Two-speed Start-up disabled)
IESO = ON	Internal External Switchover mode enabled (Two-speed Start-up enabled)

POSCMOD	Primary Oscillator Configuration bits
POSCMOD = EC	External clock mode selected
POSCMOD = XT	XT oscillator mode selected
POSCMOD = HS	HS oscillator mode selected
POSCMOD = NONE	Primary oscillator disabled

OSCIOFNC	CLKO Enable Configuration bit
OSCIOFNC = IO	Port I/O enabled (CLKO disabled)
OSCIOFNC = CLKO	CLKO output signal enabled

POSCFREQ	Primary Oscillator Frequency Range Configuration bits
POSCFREQ = LS	Primary oscillator/external clock input frequency less than 100kHz
POSCFREQ = MS	Primary oscillator/external clock input frequency between 100kHz and 8MHz
POSCFREQ = HS	Primary oscillator/external clock input frequency greater than 8MHz

SOSCSEL	SOSC Power Selection Configuration bits
SOSCSEL = SOSCLP	Secondary Oscillator configured for low-power operation
SOSCSEL = SOSCHP	Secondary Oscillator configured for high-power operation

FCKSM	Clock Switching and Monitor Selection
FCKSM = CSECME	Both Clock Switching and Fail-safe Clock Monitor are enabled
FCKSM = CSECMD	Clock Switching is enabled, Fail-safe Clock Monitor is disabled
FCKSM = CSDCMD	Both Clock Switching and Fail-safe Clock Monitor are disabled

WDTPS	Watchdog Timer Postscale Select bits
WDTPS = PS1	1 : 1
WDTPS = PS2	1 : 2
WDTPS = PS4	1 : 4
WDTPS = PS8	1 : 8
WDTPS = PS16	1 : 16
WDTPS = PS32	1 : 32
WDTPS = PS64	1 : 64
WDTPS = PS128	1 : 128
WDTPS = PS256	1 : 256
WDTPS = PS512	1 : 512
WDTPS = PS1024	1 : 1024
WDTPS = PS2048	1 : 2048
WDTPS = PS4096	1 : 4096
WDTPS = PS8192	1 : 8192
WDTPS = PS16384	1 : 16384
WDTPS = PS32768	1 : 32768

FWPSA	WDT Prescaler bit
FWPSA = PR32	WDT prescaler ratio of 1 : 32
FWPSA = PR128	WDT prescaler ratio of 1 : 128

FWDTEN	Watchdog Timer Enable bits
FWDTEN = OFF	WDT disabled in hardware; SWDTEN bit disabled
FWDTEN = NOSLP	WDT enabled while device is active and disabled in Sleep; SWDTEN bit disabled
FWDTEN = SWON	WDT controlled with the SWDTEN bit setting
FWDTEN = ON	WDT enabled in hardware

WINDIS	Windowed Watchdog Timer Disable bit
WINDIS = ON	Windowed WDT enabled
WINDIS = OFF	Standard WDT selected(windowed WDT disabled)

BOREN	Brown-out Reset Enable bits
BOREN = BOR0	Brown-out Reset disabled in hardware, SBOREN bit disabled
BOREN = BOR1	Brown-out Rest controlled by SBOREN bit
BOREN = BOR2	Brown-out Reset enabled only while device is active and disabled in SLEEP, SBOREN bit disabled
BOREN = BOR3	Brown-out Reset enabled in hardware, SBOREN bit disabled

RETCFG
RETCFG = ON	Retention regulator is available and controlled by RETEN bit
RETCFG = OFF	Retention regulator is not available

PWRTEN	Power-up Timer Enable bit
PWRTEN = OFF	PWRT disabled
PWRTEN = ON	PWRT enabled

I2C1SEL	Alternate I2C1 Pin Mapping bit
I2C1SEL = SEC	Use Alternate ASCL1/ASDA1 Pins For I2C1
I2C1SEL = PRI	Use Default SCL1/SDA1 Pins For I2C1

BORV	Brown-out Reset Voltage bits
BORV = LPBOR	Low-power Brown-Out Reset occurs around 2.0V
BORV = V30	Brown-out Reset set to Highest Voltage (3.0V)
BORV = V27	Brown-out Reset set at 2.7V
BORV = V18	Brown-out Reset set to lowest voltage (1.8V)

MCLRE	MCLR Pin Enable bit
MCLRE = OFF	RA5 input pin enabled, MCLR disabled
MCLRE = ON	RA5 input pin disabled, MCLR pin enabled

ICS	ICD Pin Placement Select bits
ICS = PGx3	EMUC/EMUD share PGC3/PGD3
ICS = PGx2	EMUC/EMUD share PGC2/PGD2
ICS = PGx1	EMUC/EMUD share PGC1/PGD1