;------------------------------------------------------------ ; Nombre del Proyecto: video_18f452 ; Fecha: 08/08/2008 ; PIC: 18F452 ; Velocidad de reloj: 40 Mhz con PLL ;------------------------------------------------------------ ERRORLEVEL -220 ERRORLEVEL -223 PROCESSOR 18F452 LIST P=PIC18F452 INCLUDE ;Bytes de configuración, consultar: C18_Config_Settings_51537e.pdf para cambiar CONFIG OSCS=OFF, OSC=HSPLL, BORV=42, BOR=ON, PWRT=ON, WDTPS=128, WDT=OFF, CCP2MUX=OFF, DEBUG=OFF, LVP=OFF, STVR=ON CONFIG CP3=OFF, CP2=OFF, CP1=OFF, CP0=OFF, CPD=OFF, CPB=OFF, WRT3=OFF, WRT2=OFF, WRT1=OFF, WRT0=OFF CONFIG WRTD=OFF, WRTB=OFF, WRTC=OFF, EBTR3=OFF, EBTR2=OFF, EBTR1=OFF, EBTR0=OFF, EBTRB=OFF ;------------------------------------------------------------ ; Declaración de Registros ;------------------------------------------------------------ contador equ 0x00 contador2 equ 0x01 flags equ 0x02 dato_ram equ 0x03 ;------------------------------------------------------------ ; Declaración de Bits ;------------------------------------------------------------ sinc equ 1 horizontal equ 0 ecualizacion equ 1 vertical equ 2 funciones equ 3 campo equ 4 post equ 5 ;------------------------------------------------------------ ; Inicio ;------------------------------------------------------------ org 0x00 goto programa ;------------------------------------------------------------ ; inicio de la interrupción por tmr0 ;------------------------------------------------------------ org 0x08 interrupcion btg LATE,sinc,0 ;invierte la señal de sincronismo BCF INTCON,TMR0IF,0 ;limpia la bandera de overflow del tmr0 btfsc flags,horizontal,0 goto sincro_h ;procesa los pulsos de sincronismo horizontal btfsc flags,ecualizacion,0 goto sincro_e ;procesa los pulsos de pre y post ecualizacíon btfsc flags,vertical,0 goto sincro_v ;procesa los pulsos de sincronismo vertical media_linea setf TMR0H,0 movlw .226 ;255-(47-14-4) movwf TMR0L,0 ;ajuste de tmr0 para 4,7 uS btfss LATE,sinc,0 retfie 1 setf TMR0H,0 movlw .7 ;255-(271-19-4) movwf TMR0L,0 ;ajuste de tmr0 para 27,1 uS bsf flags,ecualizacion,0 ;el próximo paso son los pulsos de ecualización retfie 1 sincro_h setf TMR0H,0 movlw .221 ;255-(47-9-4) movwf TMR0L,0 ;ajuste de tmr0 para 4,7 uS btfss LATE,sinc,0 retfie 1 movlw .253 movwf TMR0H,0 ;ajuste de tmr0 para 58,9 uS movlw .197 movwf TMR0L,0 ;(256*2)+(255-(589-15-4)) bcf flags,funciones,0 incf contador,f,0 movlw .253 cpfslt contador,0 ;18 goto final_campo movlw .63 cpfsgt contador,0 bsf flags,funciones,0 movlw .190 cpfslt contador,0 bsf flags,funciones,0 btfsc flags,funciones,0 ;27 retfie 1 salida_de_video movlw .4 ;demora de 1,6 uS movwf contador2,0 bucle_delay decfsz contador2,f,0 goto bucle_delay nop movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-1 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-9 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-10 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-11 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-12 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-13 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-14 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-15 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;1-16 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;2 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;3 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;4 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;5 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;6 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf INDF0,f,0 ;7 movlw 0xfe iorwf INDF0,w,0 movwf LATE,0 rrncf POSTINC0,f,0 ;8 nop nop bcf LATE,0,0 btfss contador,0,0 ;verifica si es una línea par o impar para repetir el patrón retfie 1 tstfsz FSR0L,0 incf FSR0H,f,0 decf FSR0H,f,0 movlw .16 subwf FSR0L,f,0 retfie 1 final_campo clrf contador,0 bcf flags,horizontal,0 lfsr 0,0x100 ;le carga el valor del principio de la memoria de video btfsc flags,campo,0 bsf flags,ecualizacion,0 btg flags,campo,0 retfie 1 sincro_e setf TMR0H,0 movlw .247 ;255-(23-11-4) movwf TMR0L,0 ;ajuste de tmr0 para 2,3 uS btfss LATE,sinc,0 retfie 1 movlw .254 movwf TMR0H,0 movlw .237 ;256+255-(295-17-4) movwf TMR0L,0 ;ajuste de tmr0 para 29,5 uS incf contador,f,0 movlw .6 cpfseq contador,0 retfie 1 clrf contador,0 ;21 bcf flags,ecualizacion,0 btg flags,post,0 btfss flags,post,0 ;24 goto post_ecua bsf flags,vertical,0 retfie 1 post_ecua bsf flags,horizontal,0 btfss flags,campo,0 retfie 1 movlw .253 movwf TMR0H,0 ;(2*256)+(255-(613-34-4)) movlw .192 movwf TMR0L,0 ;ajuste de tmr0 para 61,3 uS retfie 1 sincro_v setf TMR0H,0 ;255-(271-14-4) movlw .2 movwf TMR0L,0 ;ajuste de tmr0 para 27,1 uS btfss LATE,sinc,0 retfie 1 setf TMR0H,0 ;255-(47-19-4) movlw .231 movwf TMR0L,0 ;ajuste de tmr0 para 4,7 uS incf contador,f,0 movlw .6 cpfseq contador,0 retfie 1 clrf contador,0 bsf flags,ecualizacion,0 bcf flags,vertical,0 retfie 1 ;------------------------------------------------------------ ; programa principal ;------------------------------------------------------------ programa clrf TRISA,0 clrf TRISB,0 clrf TRISC,0 clrf TRISD,0 clrf TRISE,0 clrf LATE,0 bsf LATE,sinc,0 lfsr 0,0x100 bcf INTCON,GIE,0 ;desactivar habilitador general de interrupciones. cuadros_patron movlw b'10101010' movwf dato_ram,0 lfsr 1,0x100 movlw .64 movwf contador2,0 bucle_ext movlw .16 movwf contador,0 bucle_int movff dato_ram,POSTINC1 decfsz contador,f,0 goto bucle_int negf dato_ram,0 decfsz contador2,f,0 goto bucle_ext clrf flags,0 bsf flags,ecualizacion,0 setf TMR0H,0 ;ajuste de tmr0 para 2,3 uS movlw .232 movwf TMR0L,0 ;ajuste de tmr0 para 2,3 uS movlw b'10100000' ;activar habilitador general de interrupciones. movwf INTCON,0 ;activar interrupción por tmr0.;habilitar el tmro movlw b'10001000' ;asignacion del preescalado al tmr0 configurar sin preescalado movwf T0CON,0 ;origen de la señal de reloj de tmr0 = reloj interno clrf LATE,0 bucle_princ btfsc flags,funciones,0 call glcd goto bucle_princ glcd nop return end