Hola a todos en el nuevo foro
tengo un problema con los procedimeintos (procedures), tengo que hacer un pequeño controlador utilizando procedures para poder invocarlo desde cualquier programa, pero los ejemplo que encontre en un libro y en la web, me indican que puedo utilizar la sentencia WAIT dentro de un procedimeinto, mas, cuando intento sintetizar el programa me sale error "Wait statement in a procedure is not accepted." :shock:
el codigo es el siguiente:
library IEEE;
use IEEE.STD_LOGIC_1164.all;
package lcd is
procedure write_lcd(signal clk: in std_logic;
signal lcd_rs: out std_logic;
signal lcd_rw :out std_logic;
signal lcd_en: out std_logic;
signal lcd_letra_in: in std_logic_vector(7 downto 0);
signal lcd_data: out std_logic_vector(7 downto 0)
);
procedure init_lcd(signal clk: in std_logic;
signal lcd_rs: out std_logic;
signal lcd_rw :out std_logic;
signal lcd_en: out std_logic;
-- signal lcd_data_in: in std_logic_vector(7 downto 0);
signal lcd_data: out std_logic_vector(7 downto 0)
);
end lcd;
package body lcd is
procedure write_lcd(signal clk: in std_logic;
signal lcd_rs: out std_logic;
signal lcd_rw: out std_logic;
signal lcd_en: out std_logic;
signal lcd_letra_in: in std_logic_vector(7 downto 0);
signal lcd_data: out std_logic_vector(7 downto 0)
) is
begin
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='1';
lcd_data<=lcd_letra_in;
wait until clk'event and clk = '1';
lcd_en<='0';
end write_lcd;
----------------------------------------------------------------
--init
------------------
procedure init_lcd(signal clk: in std_logic;
signal lcd_rs: out std_logic;
signal lcd_rw: out std_logic;
signal lcd_en:out std_logic;
--signal lcd_data_in in std_logic_vector(7 downto 0);
signal lcd_data: out std_logic_vector(7 downto 0)
) is
begin
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='0';
lcd_data<=X"38"; --8bits,1linea,5x8
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='0';
lcd_data<=X"38"; --8bits,1linea,5x8
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='0';
lcd_data<=X"38"; --8bits,1linea,5x8
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='0';
lcd_data<=X"06"; --no se
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='0';
lcd_data<=X"0D"; --od
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='0';
lcd_data<=X"01"; --
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='0';
lcd_data<=X"80"; --
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='1';
lcd_data<=X"31"; --8bits,1linea,5x8
wait until clk'event and clk = '1';
lcd_en<='0';
wait until clk'event and clk = '1';
lcd_en<='1';
lcd_rw<='0';
lcd_rs<='1';
lcd_data<=X"38"; --8bits,1linea,5x8
wait until clk'event and clk = '1';
lcd_en<='0';
end init_lcd;
end lcd;
como podría reemplazar la sentencia wait?, intente usando una maquina de estados y el sintetizador me dice que las señales no pueden depender de 2 clocks...hay alguna forma de hacer maquinas de estado secuenciales dentro de un procedimiento?
el codigo desde el cual intento llamar al procedimiento es:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.lcd.all;
entity proced is
port(
--pines del LCD
lcd_rs,lcd_rw,lcd_en:out std_logic;
lcd_data:out std_logic_vector(7 downto 0);
--señales
p1:in std_logic;
p2:in std_logic;
lcd_clk:in std_logic
);
end proced;
architecture Behavioral of proced is
--contadores para el driver
signal cont_lcd: integer range 0 to 2;
--signal cont_lcdbuf: integer range 0 to 10;
--el segundo clock
signal laA:std_logic_vector(7 downto 0):=X"41";
signal laB:std_logic_vector(7 downto 0):=X"42";
signal count1:integer range 0 to 20001:=0;
signal clkout:std_logic:='0';
begin
-------------------------------------------------
--Rutina de retardo de clock
-------------------------------------------------
clockin: process (lcd_clk)
--variable count1:integer range 0 to 20001:=0;
begin
if lcd_clk'event and lcd_clk = '1' then
count1<= count1 + 1;
if count1 = 20000 then
clkout <= not clkout;
count1 <= 0;
end if;
end if;
end process;
-------------------------------------------------------
-- CONTROLADORCITO
-------------------------------------------------------
lcd_driv:process (clkout)
begin
if clkout'event and clkout ='1' then
if cont_lcd = 2 then
cont_lcd <= 1;
else
cont_lcd<= cont_lcd +1;
end if;
case cont_lcd is
when 0 => init_lcd(clkout,lcd_rs,lcd_rw,lcd_en,lcd_data);
when 1 => if p1 = '1' then
write_lcd(clkout,lcd_rs,lcd_rw,lcd_en,laA,lcd_data);
elsif p2 = '1' then
write_lcd(clkout,lcd_rs,lcd_rw,lcd_en,laB,lcd_data);
end if;
when 2 => null;
end case;
end if;
end process;
end Behavioral;
gracias de antemano.... :-/