void HDByteSingleWriteI2C(unsigned char ControlByte, unsigned char HighAdd, unsigned char LowAdd, unsigned char data)//FUNCA
{
//unsigned char z;
//z=0;
initi2c();
StartI2C1(); //Generate Start COndition
delay_10us(10);
MasterWriteI2C1(ControlByte); //WriteI2C(ControlByte); //Write Control byte
IdleI2C1();
while(I2C1STATbits.ACKSTAT); //ErrorCode = ACKStatus(); //Return ACK Status
MasterWriteI2C1(HighAdd);
IdleI2C1(); //Write High Address
MasterWriteI2C1(LowAdd); //Write Low Address
IdleI2C1();
//while(I2C1STATbits.ACKSTAT); //Return ACK Status
while(!IFS1bits.MI2C1IF); //Wait for ninth clock cycle
IFS1bits.MI2C1IF = 0; //Clear interrupt flag
MasterWriteI2C1(data); //Write Data
//while(I2C1STATbits.ACKSTAT);
IdleI2C1();
StopI2C1(); //Initiate Stop Condition
//while(I2C1CONbits.PEN);
//EEAckPolling(ControlByte); //perform Ack Polling
delay_ms(8);
return;
}
unsigned char lectura_memo(void)
{
unsigned char direcalta, direcbaja, control_write, control_read;
unsigned char z;
direcalta = 0x00;
direcbaja = 0x06;
control_write = 0xA0;
control_read = 0xA1;
IdleI2C1();
StartI2C1(); //Generate Start COndition
delay_10us(10);
//while(!I2C1STATbits.S); //ESPERO QUE SE COMPLETE START
MasterWriteI2C1(0xA8);
while(I2C1STATbits.TBF);
IdleI2C1();
while(I2C1STATbits.ACKSTAT); //ESPERO ACK
MasterWriteI2C1(0x00);
while(I2C1STATbits.TBF);
IdleI2C1();
while(I2C1STATbits.ACKSTAT); //ESPERO ACK
MasterWriteI2C1(0x06);
while(I2C1STATbits.TBF);
IdleI2C1();
while(I2C1STATbits.ACKSTAT); //ESPERO ACK
StartI2C1();
while (I2C1CONbits.RSEN); // Wait until re-start condition is over//while(!I2C1STATbits.S);//ESPERO QUE SE COMPLETE START
MasterWriteI2C1(0xA9);
IdleI2C1();
while(I2C1STATbits.ACKSTAT);
//while(!I2C1CONbits.RCEN ); //= 1;
//while(!I2C1STATbits.RBF);
z = MasterReadI2C1();
IdleI2C1();
NotAckI2C1();
StopI2C1(); //Initiate Stop Condition
IdleI2C1();
delay_ms(1);
return z;
}