Buenas gente, estoy teniendo una pequeña dificultad y queria ver si alguno podria darme una mano, estoy haciendo una comunicacion serie con un dispositivo que transmite continuo, y lo tengo que enviarlo a la pc. Para adaptar los niveles uso un max232.
El tema es el siguiente: recibo el String independientemente el largo que tenga en array y me lo transmite completo aun cuando lo programo para que envie solo un caracter.
A continuacion pongo el codigo. cualquier consejo o idea es bienvenida..
// CONFIG1L
#pragma config CPUDIV = NOCLKDIV// CPU System Clock Selection bits (No CPU System Clock divide)
#pragma config USBDIV = OFF // USB Clock Selection bit (USB clock comes directly from the OSC1/OSC2 oscillator block; no divide)
// CONFIG1H
#pragma config FOSC = IRC // Oscillator Selection bits (Internal RC oscillator)
#pragma config PLLEN = OFF // 4 X PLL Enable bit (PLL is under software control)
#pragma config PCLKEN = ON // Primary Clock Enable bit (Primary clock enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRTEN = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = NOSLP // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled))
#pragma config BORV = 19 // Brown-out Reset Voltage bits (VBOR set to 1.9 V nominal)
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bit (WDT is controlled by SWDTEN bit of the WDTCON register)
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config HFOFST = OFF // HFINTOSC Fast Start-up bit (The system clock is held off until the HFINTOSC is stable.)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RA3 input pin disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)
#pragma config BBSIZ = OFF // Boot Block Size Select bit (1kW boot block size)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Table Write Protection bit (Block 0 not write-protected)
#pragma config WRT1 = OFF // Table Write Protection bit (Block 1 not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block not protected from table reads executed in other blocks)
void main(void) {
int i = 0;
int j = 0;
//char Rxdata[18];
char Txdata[6];
char Rxdata[20];
char TX;
//char Txdata;
unsigned char config = 0;
unsigned spbrg = 0;
OSCCON = 0b01010011;
TRISA = 0;
TRISB = 0;
TRISC = 0;
// SPBRG = 207;
config = USART_TX_INT_OFF & USART_RX_INT_OFF & USART_BRGH_HIGH & USART_CONT_RX & USART_EIGHT_BIT & USART_ASYNCH_MODE & USART_ADDEN_OFF;
//spbrg = 832;//BAUDCONbits.BRG16 = 1;TXSTAbits.BRGH = 1; // 1200; BRGH = 1; BRG16 = 1
spbrg = 207;//BAUDCONbits.BRG16 = 0;TXSTAbits.BRGH = 1; // 1200; BRGH = 1; BRG16 = 0
//spbrg = 51; // 1200; BRGH = 0; BRG16 = 0
//spbrg = 207;//BAUDCONbits.BRG16 = 1;TXSTAbits.BRGH = 0; // 1200; BRGH = 0; BRG16 = 1
//spbrg = 25; // 9600; BRGH = 1; BRG16 = 0
OpenUSART(config, spbrg);
BAUDCONbits.BRG16 = 0;TXSTAbits.BRGH = 1;
//Delay10TCYx(10);
//baudUSART(BAUD_16_BIT_RATE | BAUD_WAKEUP_ON | BAUD_AUTO_OFF);
/*TXSTAbits.TXEN = 1;
TXSTAbits.SYNC = 0;
RCSTAbits.CREN = 1;
RCSTAbits.SPEN = 1;
RCSTAbits.RX9 = 0;
TXSTAbits.TX9 = 0;
PIE1bits.TXIE = 0;
PIE1bits.RCIE = 0;
BAUDCONbits.WUE = 0;
BAUDCONbits.ABDEN = 1;
TXSTAbits.BRGH = 1;
BAUDCONbits.BRG16 = 0;*/
TRISBbits.TRISB5 = 1;
TRISBbits.TRISB7 = 0;
INTCONbits.GIE = 0;
ANSELHbits.ANS11 = 0;
ANSELHbits.ANS9 = 0;
while (1){
for (i = 0; i < 5; i++) {
Rxdata = ReadUSART();
UART_Write(Rxdata);
i++;
}
}
CloseUSART();
}
