pues es verdad .
https://ww1.microchip.com/downloads/en/DeviceDoc/40001753B.pdfpero hay que havilitar el bit LVP entrando en programacion alto voltage y ya se queda asi siempre mientras no se borren los bits de config .
3.1.2 LOW-VOLTAGE PROGRAMMING (LVP) MODE
The Low-Voltage Programming mode allows the devices to be programmed using VDD only, without high voltage. When
the LVP bit of the Configuration Word 3 register is set to ‘1’, the low-voltage ICSP programming entry is enabled. To
disable the Low-Voltage ICSP mode, the LVP bit must be programmed to ‘0’. This can only be done while in the
High-Voltage Entry mode.
Entry into the Low-Voltage ICSP Program/Verify mode requires the following steps:
1. MCLR is brought to VIL
2. A 32-bit key sequence is presented on ICSPDAT. The LSb of pattern is a “don’t care x”. The program/verify
mode entry pattern detect hardware verifies only the first 31 bits of the sequence and the last clock is required
before the pattern detect goes active.
The key sequence is a specific 32-bit pattern, '32’h4d434850' (more easily remembered as MCHP in ASCII). The
device will enter Program/Verify mode only if the sequence is valid. The Most Significant bit of the Most Significant nibble
must be shifted in first. Once the key sequence is complete, MCLR must be held at VIL for as long as Program/Verify
mode is to be maintained. For low-voltage programming timing, see Figure 3-3 and Figure 3-4
DS40001753B-page 8